Masaki Kumanoya

Publication Activity (10 Years)

Years Active: 1994-1999
Publications (10 Years): 0

Publications

Yasunobu Nakase, Yoshikazu Morooka, David J. Perlman, Daniel J. Kolor, Jae-Myoung Choi, Hyun J. Shin, Tsutomu Yoshimura, Naoya Watanabe, Yoshio Matsuda, Masaki Kumanoya, Michihiro Yamada
Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface. IEEE J. Solid State Circuits 34 (4) (1999)
Katsumi Dosaka, Akira Yamazaki, Naoya Watanabe, Hideaki Abe, Jun Ohtani, Toshiyuki Ogawa, Kazunori Ishihara, Masaki Kumanoya
A 90-MHz 16-Mb system integrated memory with direct interface to CPU. IEEE J. Solid State Circuits 31 (4) (1996)
Masaki Kumanoya, Toshiyuki Ogawa, Kazunari Inoue
Advances in DRAM interfaces. IEEE Micro 15 (6) (1995)
Yasuhiro Konishi, Toshiyuki Ogawa, Masaki Kumanoya
Testing 256k Word x 16 Bit Cache DRAM (CDRAM). ITC (1994)