A low power and high speed data transfer scheme with asynchronous compressed pulse width modulation for AS-Memory.
Tadaaki YamauchiYoshikazu MorookaHideyuki OzakiPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- low power
- data transfer
- high speed
- data transmission
- data access
- power consumption
- low cost
- data flow
- data acquisition
- delay insensitive
- file system
- pulse width modulation
- digital signal processing
- vlsi architecture
- power dissipation
- cmos technology
- single phase
- real time
- database
- embedded systems
- data processing
- image compression
- wireless sensor networks
- induction motor