Tohru Sasaki

Publication Activity (10 Years)

Years Active: 1980-2021
Publications (10 Years): 6

Top Topics

Motion Parameters

Data Association

Top Venues

Int. J. Autom. Technol.

J. Robotics Mechatronics

Publications

Bilal Ahmed Mir, Tohru Sasaki, Yusuke Nagahata, Eri Yamabe, Naoya Miwa, Kenji Terabayashi
Surrounding Structure Estimation Using Ambient Light. Int. J. Autom. Technol. 15 (6) (2021)
Yusuke Ikemoto, Kenichiro Nishimura, Yuichiro Mizutama, Tohru Sasaki, Mitsuru Jindai
Network Connectivity Control of Mobile Robots by Fast Position Estimations and Laplacian Kernel. J. Robotics Mechatronics 32 (2) (2020)
Tohru Sasaki, Yudai Fujiwara, Kaoru Tachikawa, Kenji Terabayashi, Kuniaki Dohda
Hydraulic Micro Device with Force Sensing for Measurement of Mechanical Characteristics. Int. J. Autom. Technol. 14 (4) (2020)
Mitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki
Hug Behavior Request Model with Approaching Human for Hug Robots. ICSR (2019)
Naoya Hatakeyama, Tohru Sasaki, Kenji Terabayashi, Masahiro Funato, Mitsuru Jindai
Position and Posture Measurement Method of the Omnidirectional Camera Using Identification Markers. J. Robotics Mechatronics 30 (3) (2018)
Mitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki, Yoshihiro Sejima
Development of a hug request motion model during active approach to human. SMC (2017)
Shunsuke Ota, Mitsuru Jindai, Tohru Sasaki, Yusuke Ikemoto
Handshake response motion model with approaching of human based on an analysis of human handshake motions. ICUMT (2015)
Mitsuru Jindai, Shunsuke Ota, Yusuke Ikemoto, Tohru Sasaki
Handshake request motion model with an approaching human for a handshake robot system. RAM/CIS (2015)
Tohru Sasaki, Kunio Koizumi, Motofumi Sasaki
Motion Characteristics of Loop Type Elliptic Resonator. J. Robotics Mechatronics 20 (1) (2008)
Shigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Nobuhiko Koike, Kenji Ohmori
Block-Level Hardware Logic Simulation Machine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (1) (1987)
Shigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Hiroshi Ishikura, Nobuhiko Koike
HAL II: a mixed level hardware logic simulation system. DAC (1986)
Nobuhiko Koike, Kenji Ohmori, Tohru Sasaki
HAL: A High-Speed Logic Simulation Machine. IEEE Des. Test 2 (5) (1985)
Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka
Logic Design Verification Using Automated Test Generation. ITC (1984)
Masato Kawai, Hideo Shibano, Shigehiro Funatsu, Shunichi Kato, T. Kurobe, K. Ookawa, Tohru Sasaki
A High Level Test Pattern Generation Algorithm. ITC (1983)
Tohru Sasaki, Nobuhiko Koike, Kenji Ohmori, Kyoji Tomita
HAL: A block level HArdware Logic simulator. DAC (1983)
Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato
Hierarchical design verification for large digital systems. DAC (1981)
Tohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu
MIXS: A mixed level simulator for large digital system logic verification. DAC (1980)