Block-Level Hardware Logic Simulation Machine.
Shigeru TakasakiTohru SasakiNobuyoshi NomizuNobuhiko KoikeKenji OhmoriPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1987)
Keyphrases
- hardware software
- chip design
- digital circuits
- hardware and software
- real time
- simulation environment
- digital computer
- mathematical model
- embedded systems
- simulation models
- logic programming
- image processing
- learning algorithm
- simulation model
- simulation study
- computing power
- multi valued
- hardware design
- defeasible logic
- computer systems