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Takao Toi
Publication Activity (10 Years)
Years Active: 1999-2024
Publications (10 Years): 3
Top Topics
Pruning Method
Real Environment
St Century
Ibm Zenterprise
Top Venues
VLSI Circuits
ISSCC
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Publications
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Koichi Nose
,
Taro Fujii
,
Katsumi Togawa
,
Shunsuke Okumura
,
Kentaro Mikami
,
Daichi Hayashi
,
Teruhito Tanaka
,
Takao Toi
20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.
ISSCC
(2024)
Fukashi Morishita
,
Norihito Kato
,
Satoshi Okubo
,
Takao Toi
,
Mitsuru Hiraki
,
Sugako Otani
,
Hideaki Abe
,
Yuji Shinohara
,
Hiroyuki Kondo
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems.
VLSI Circuits
(2021)
Taro Fujii
,
Takao Toi
,
Teruhito Tanaka
,
Katsumi Togawa
,
Toshiro Kitaoka
,
Kengo Nishino
,
Noritsugu Nakamura
,
Hiroki Nakahara
,
Masato Motomura
New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications.
VLSI Circuits
(2018)
Takao Toi
,
Noritsugu Nakamura
,
Taro Fujii
,
Toshiro Kitaoka
,
Katsumi Togawa
,
Koichiro Furuta
,
Toru Awashima
Optimizing time and space multiplexed computation in a dynamically reconfigurable processor.
FPT
(2013)
Takao Toi
,
Takumi Okamoto
,
Toru Awashima
,
Kazutoshi Wakabayashi
,
Hideharu Amano
Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(12) (2011)
Takao Toi
,
Noritsugu Nakamura
,
Yoshinosuke Kato
,
Toru Awashima
,
Kazutoshi Wakabayashi
High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor.
IPSJ Trans. Syst. LSI Des. Methodol.
3 (2010)
Takao Toi
,
Takumi Okamoto
,
Toru Awashima
,
Kazutoshi Wakabayashi
,
Hideharu Amano
Wire congestion aware synthesis for a dynamically reconfigurable processor.
FPT
(2010)
Shohei Abe
,
Yohei Hasegawa
,
Takao Toi
,
Takeshi Inuo
,
Hideharu Amano
An adaptive Viterbi decoder on the dynamically reconfigurable processor.
FPT
(2006)
Takao Toi
,
Noritsugu Nakamura
,
Yoshinosuke Kato
,
Toru Awashima
,
Kazutoshi Wakabayashi
,
Li Jing
High-level synthesis challenges and solutions for a dynamically reconfigurable processor.
ICCAD
(2006)
Masayasu Suzuki
,
Yohei Hasegawa
,
Yutaka Yamada
,
Naoto Kaneko
,
Katsuaki Deguchi
,
Hideharu Amano
,
Kenichiro Anjo
,
Masato Motomura
,
Kazutoshi Wakabayashi
,
Takao Toi
,
Toru Awashima
Stream applications on the dynamically reconfigurable processor.
FPT
(2004)
Takao Toi
Color signal processing technique for single-chip CCD cameras that employ CPUs with SIMD instruction sets.
IEEE Trans. Consumer Electron.
46 (2) (2000)
Takao Toi
,
M. Ohita
A subband coding technique for image compression in single CCD cameras with Bayer color filter arrays.
IEEE Trans. Consumer Electron.
45 (1) (1999)