Srinivasan Murali

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 17

Top Topics

Beat Classification

Health Monitoring

Radio Frequency

Top Venues

Proc. ACM Interact. Mob. Wearable Ubiquitous Technol.

Publications

Srinivasan Murali, Wenqiang Jin, Vighnesh Sivaraman, Huadi Zhu, Tianxi Ji, Pan Li, Ming Li
Continuous Authentication Using Human-Induced Electric Potential. ACSAC (2023)
Huadi Zhu, Tianhao Li, Chaowei Wang, Wenqiang Jin, Srinivasan Murali, Mingyan Xiao, Dongqing Ye, Ming Li
EyeQoE: A Novel QoE Assessment Model for 360-degree Videos Using Ocular Behaviors. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 6 (1) (2022)
Wenqiang Jin, Srinivasan Murali, YoungTak Cho, Huadi Zhu, Tianhao Li, Rachael Thompson Panik, Anika Rimu, Shuchisnigdha Deb, Kari E. Watkins, Xu Yuan, Ming Li
CycleGuard: A Smartphone-based Assistive Tool for Cyclist Safety Using Acoustic Ranging. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 5 (4) (2021)
Wenqiang Jin, Srinivasan Murali, Huadi Zhu, Ming Li
Periscope: A Keystroke Inference Attack Using Human Coupled Electromagnetic Emanations. CCS (2021)
Huadi Zhu, Wenqiang Jin, Mingyan Xiao, Srinivasan Murali, Ming Li
BlinKey: A Two-Factor User Authentication Method for Virtual Reality Devices. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 4 (4) (2020)
Wenqiang Jin, Ming Li, Srinivasan Murali, Linke Guo
Harnessing the Ambient Radio Frequency Noise for Wearable Device Pairing. CCS (2020)
Wenjun Jiang, Hongfei Xue, Chenglin Miao, Shiyang Wang, Sen Lin, Chong Tian, Srinivasan Murali, Haochen Hu, Zhi Sun, Lu Su
Towards 3D human pose construction using wifi. MobiCom (2020)
Grégoire Surrel, Amir Aminifar, Francisco J. Rincón, Srinivasan Murali, David Atienza
Online Obstructive Sleep Apnea Detection on Medical Wearable Sensors. IEEE Trans. Biomed. Circuits Syst. 12 (4) (2018)
Elisabetta De Giovanni, Srinivasan Murali, Francisco J. Rincón, David Atienza
Ultra-Low Power Estimation of Heart Rate Under Physical Activity Using a Wearable Photoplethysmographic System. DSD (2016)
Dionisije Sopic, Srinivasan Murali, Francisco J. Rincón, David Atienza
Touch-based system for beat-to-beat impedance cardiogram acquisition and hemodynamic parameters estimation. DATE (2016)
Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
Low-Power Wearable System for Real-Time Screening of Obstructive Sleep Apnea. ISVLSI (2016)
Alair Dias Junior, Srinivasan Murali, Francisco J. Rincón, David Atienza
Methods for reliable estimation of pulse transit time and blood pressure variations using smartphone sensors. Microprocess. Microsystems 46 (2016)
Alair Dias Junior, Srinivasan Murali, Francisco J. Rincón, David Atienza
Estimation of Blood Pressure and Pulse Transit Time Using Your Smartphone. DSD (2015)
Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
Design of ultra-low-power smart wearable systems. LATS (2015)
Srinivasan Murali, Francisco J. Rincón, David Atienza
A Wearable Device for Physical and Emotional Health Monitoring. CinC (2015)
Grégoire Surrel, Francisco J. Rincón, Srinivasan Murali, David Atienza
Real-Time Probabilistic Heart-Beat Classification and Correction for Embedded Systems. CinC (2015)
Manoj Padmanabhan, Srinivasan Murali, Francisco J. Rincón, David Atienza
Energy-aware embedded classifier design for real-time emotion analysis. EMBC (2015)
Rubén Braojos, Hossein Mamaghanian, Alair Dias Junior, Giovanni Ansaloni, David Atienza, Francisco J. Rincón, Srinivasan Murali
Ultra-Low Power Design of Wearable Cardiac Monitoring Systems. DAC (2014)
Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip. IEEE Trans. Computers 62 (3) (2013)
Ciprian Seiculescu, Dara Rahmati, Srinivasan Murali, Hamid Sarbazi-Azad, Luca Benini, Giovanni De Micheli
Designing best effort networks-on-chip to meet hard latency constraints. ACM Trans. Embed. Comput. Syst. 12 (4) (2013)
Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands. J. Electr. Comput. Eng. 2012 (2012)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
A DRAM Centric NoC Architecture and Topology Design Approach. ISVLSI (2011)
M. Pawan Kumar, Anish S. Kumar, Srinivasan Murali, Luca Benini, Kamakoti Veezhinathan
A Method for Integrating Network-on-Chip Topologies with 3D ICs. ISVLSI (2011)
Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
A Simulation Based Buffer Sizing Algorithm for Network on Chips. ISVLSI (2011)
Srinivasan Murali, Luca Benini, Giovanni De Micheli
Design of networks on chips for 3D ICs. ASP-DAC (2010)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
A method to remove deadlocks in Networks-on-Chips with Wormhole flow control. DATE (2010)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini
Networks on Chips: from research to products. DAC (2010)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands. IEEE Trans. Circuits Syst. II Express Briefs (5) (2010)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips. DATE (2009)
Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli
Synthesis of networks on chips for 3D systems on chips. ASP-DAC (2009)
Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
A method for calculating hard QoS guarantees for Networks-on-Chip. ICCAD (2009)
Mohammad Reza Kakoee, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Ciprian Seiculescu, Luca Benini
A floorplan-aware interactive tool flow for NoC design and synthesis. SoCC (2009)
Almir Mutapcic, Stephen P. Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta
Processor Speed Control With Thermal Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2009)
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
NoC topology synthesis for supporting shutdown of voltage islands in SoCs. DAC (2009)
Vincenzo Rana, Srinivasan Murali, David Atienza, Marco D. Santambrogio, Luca Benini, Donatella Sciuto
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems. CODES+ISSS (2009)
David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli
Network-on-Chip design and synthesis outlook. Integr. 41 (3) (2008)
Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Luca Benini, Giovanni De Micheli
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization. DATE (2008)
Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini
Bringing NoCs to 65 nm. IEEE Micro 27 (5) (2007)
Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees. VLSI Design 2007 (2007)
Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini
NoC Design and Implementation in 65nm Technology. NOCS (2007)
Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Giovanni De Micheli
Temperature-aware processor frequency assignment for MPSoCs using convex optimization. CODES+ISSS (2007)
Srinivasan Murali, Giovanni De Micheli
An Application-Specific Design Methodology for STbus Crossbar Generation CoRR (2007)
Srinivasan Murali, Luca Benini, Giovanni De Micheli
An Application-Specific Design Methodology for On-Chip Crossbar Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (7) (2007)
Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 15 (8) (2007)
Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli
Early wire characterization for predictable network-on-chip global interconnects. SLIP (2007)
Rutuparna Tamhankar, Srinivasan Murali, Stergios Stergiou, Antonio Pullini, Federico Angiolini, Luca Benini, Giovanni De Micheli
Timing-Error-Tolerant Network-on-Chip Design Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (7) (2007)
Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
Designing Routing and Message-Dependent Deadlock Free Networks on Chips. VLSI-SoC (Selected Papers) (2006)
Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
Designing application-specific networks on chips with floorplan information. ICCAD (2006)
Federico Angiolini, David Atienza, Srinivasan Murali, Luca Benini, Giovanni De Micheli
Reliability Support for On-Chip Memories Using Networks-on-Chip. ICCD (2006)
Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
Mapping and configuration methods for multi-use-case networks on chips. ASP-DAC (2006)
Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip. DAC (2006)
Srinivasan Murali, Rutuparna Tamhankar, Federico Angiolini, Antonio Pullini, David Atienza, Luca Benini, Giovanni De Micheli
Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips. SoC (2006)
Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. VLSI-SoC (2006)
Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
A methodology for mapping multiple use-cases onto networks on chips. DATE (2006)
Paolo Meloni, Srinivasan Murali, Salvatore Carta, Massimo Camplani, Luigi Raffo, Giovanni De Micheli
Routing Aware Switch Hardware Customization for Networks on Chips. Nano-Net (2006)
Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. CODES+ISSS (2006)
Srinivasan Murali, Giovanni De Micheli
An Application-Specific Design Methodology for STbus Crossbar Generation. DATE (2005)
Rutuparna Tamhankar, Srinivasan Murali, Giovanni De Micheli
Performance driven reliable link design for networks on chips. ASP-DAC (2005)
Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli
Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. 22 (5) (2005)
Srinivasan Murali
Design Methodologies and CAD Tool Flows for Networks on Chips. SoC (2005)
Srinivasan Murali, Luca Benini, Giovanni De Micheli
Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. ASP-DAC (2005)
Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. IEEE Trans. Parallel Distributed Syst. 16 (2) (2005)
Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli
×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip. DATE (2004)
Srinivasan Murali, Giovanni De Micheli
SUNMAP: a tool for automatic topology selection and generation for NoCs. DAC (2004)
Srinivasan Murali, Giovanni De Micheli
Bandwidth-Constrained Mapping of Cores onto NoC Architectures. DATE (2004)