Stéphane Badel

Publication Activity (10 Years)

Years Active: 2003-2011
Publications (10 Years): 0

Publications

Alessandro Cevrero, Francesco Regazzoni, Micheal Schwander, Stéphane Badel, Paolo Ienne, Yusuf Leblebici
Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library. DAC (2011)
Stéphane Badel, Nilay Dagtekin, Jorge Nakahara Jr., Khaled Ouafi, Nicolas Reffé, Pouyan Sepehrdad, Petr Susil, Serge Vaudenay
ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware. CHES (2010)
Massimo Alioto, Stéphane Badel, Yusuf Leblebici
Optimization of the wire grid size for differential routing: Analysis and impact on the power-delay-area tradeoff. Microelectron. J. 41 (10) (2010)
Massimo Alioto, Stéphane Badel, Yusuf Leblebici
Optimization of Wire Grid Size for Differential Routing and Impact on the Power-delay-area Tradeoff. ISCAS (2009)
Francesco Regazzoni, Alessandro Cevrero, François-Xavier Standaert, Stéphane Badel, Theo Kluter, Philip Brisk, Yusuf Leblebici, Paolo Ienne
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. CHES (2009)
Stéphane Badel, Alexandre Schmid, Yusuf Leblebici
CMOS realization of two-dimensional mixed analog-digital Hamming distance discriminator circuits for real-time imaging applications. Microelectron. J. 39 (12) (2008)
Stéphane Badel, Erdem Guleyupoglu, Ozgur Inac, Anna Pena Martinez, Paolo Vietti, Frank K. Gürkaynak, Yusuf Leblebici
A Generic Standard Cell Design Methodology for Differential Circuit Styles. DATE (2008)
I. Hatyrnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici
Predictable system interconnects through accurate early wire characterization. SoCC (2007)
Stéphane Badel, Yusuf Leblebici
Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage. ISCAS (2007)
Francesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. ICSAMOS (2007)
Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli
Early wire characterization for predictable network-on-chip global interconnects. SLIP (2007)
Stéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer
Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells. VLSI-SoC (2006)
Elizabeth J. Brauer, Ilhan Hatirnaz, Stéphane Badel, Yusuf Leblebici
Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design. ISCAS (2006)
Stéphane Badel, Alexandre Schmid, Yusuf Leblebici
Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture. ISCAS (5) (2004)
Stéphane Badel, Alexandre Schmid, Yusuf Leblebici
VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications. ESANN (2003)