Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage.
Stéphane BadelYusuf LeblebiciPublished in: ISCAS (2007)
Keyphrases
- low power
- logic circuits
- power dissipation
- high speed
- power consumption
- high power
- gate array
- single chip
- low cost
- power reduction
- functional decomposition
- low power consumption
- cmos technology
- vlsi architecture
- digital signal processing
- ultra low power
- nm technology
- logic synthesis
- vlsi circuits
- tunnel diode
- mixed signal
- low voltage
- energy dissipation
- real time
- power saving
- power management