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Early wire characterization for predictable network-on-chip global interconnects.
Ilhan Hatirnaz
Stéphane Badel
Nuria Pazos
Yusuf Leblebici
Srinivasan Murali
David Atienza
Giovanni De Micheli
Published in:
SLIP (2007)
Keyphrases
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network on chip
power dissipation
routing algorithm
cmos technology
high speed
parallel processing