Shen-Li Chen

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 22

Top Topics

Operating Conditions

Gallium Arsenide

Embedded Systems

Top Venues

Publications

Xiu-Yuan Yang, Xing-Chen Mai, Shen-Li Chen, Yu-Jie Chung, Jhong-Yi Lai, Ting-En Lin
ESD-capability Study of High-voltage nLDMOSs with out the Drift Region DPW Effect. ICCE-Taiwan (2023)
Ting-En Lin, Shen-Li Chen, Zhi-Wei Liu, Xing-Chen Mai, Xiu-Yuan Yang, Yu-Jie Chung
High-voltage nLDMOS Drain Side Schottky/SCR Modulations for Enhancement Reliability Capabilities. ICCE-Taiwan (2023)
Zhi-Wei Liu, Shen-Li Chen, Jhong-Yi Lai, Xing-Chen Mai, Yu-Jie Chung
An Investigation of ESD-Enhancement by the Drain-side Embedded SCR Area Modulation for HV pLDMOSs. ICCE-TW (2022)
Jhong-Yi Lai, Shen-Li Chen, Zhi-Wei Liu, Xing-Chen Mai, Yu-Jie Chung
ESD Capability Analysis of High-voltage nLDMOSs by the Bulk Terminal Modulation. ICCE-TW (2022)
Shi-Zhe Hong, Shen-Li Chen, Tien-Yu Lan, Yu-Jie Zhou, Zhi-Wei Liu, Jhong-Yi Lai
ESD-Immunity Impact of HV pLDMOS with Drain-side Embedded Horizontal P-type Schottky Modulations. ICCE-TW (2021)
Yu-Jie Zhou, Shen-Li Chen, Tien-Yu Lan, Shi-Zhe Hong, Zhi-Wei Liu, Zhong-Yi Lai
Improved UHV IGBT-Cell for ESD Protection with High Holding Voltage via a 0.5µm BCD Process. ICCE-TW (2021)
Tien-Yu Lan, Shen-Li Chen, Yu-Jie Zhou, Shi-Zhe Hong, Jhong-Yi Lai, Zhi-Wei Liu
Holding-voltage Improvement of UHV Circular nLDMOS Transistors by the Drain-side SCR Engineering. ICCE-TW (2021)
Sheng-Kai Fan, Shen-Li Chen, Po-Lin Lin, Shi-Zhe Hong, Tien-Yu Lan, Yu-Jie Zhou
A Novel SCR-based Schottky Diode and Lightly P-well Additions of HV 60V nLDMOS on ESD Capability. ICCE-TW (2020)
Shi-Zhe Hong, Shen-Li Chen, Sheng-Kai Fan, Po-Lin Lin, Tien-Yu Lan, Yu-Jie Zhou
Strengthened ESD Reliability of HV nLDMOSs with Embedded Horizontal Schottky Devices. ICKII (2020)
Tien-Yu Lan, Shen-Li Chen, Po-Lin Lin, Sheng-Kai Fan, Yu-Jie Zhou, Shi-Zhe Hong, Hung-Wei Chen
ESD-ability of Circular nLDMOS Transistors of UHV by Super-junction Length Modulation and Concentration Gradient. ICKII (2020)
Tien-Yu Lan, Shen-Li Chen, Sheng-Kai Fan, Po-Lin Lin, Yu-Jie Zhou, Shi-Zhe Hong, Hung-Wei Chen
ESD-capability Influences of UHV Circular nLDMOS Transistors by the Drain-side Ladder-step STI. ICCE-TW (2020)
Yu-Jie Zhou, Shen-Li Chen, Pei-Lin Wu, Po-Lin Lin, Sheng-Kai Fan, Tien-Yu Lan, Shi-Zhe Hong
ESD-capability Enhancement of Ultra-high Voltage nLDMOSs by the DPW Discrete Layer. ICKII (2020)
Po-Lin Lin, Shen-Li Chen, Sheng-Kai Fan, Tien-Yu Lan, Yu-Jie Zhou, Shi-Zhe Hong
Improving the ESD Robustness of an Ultra-high Voltage nLDMOS Device with the Embedded Schottky Diode. ICCE-TW (2020)
Po-Lin Lin, Shen-Li Chen, Pei-Lin Wu, Yu-Lin Jhou, Sheng-Kai Fan
Evaluating the Drift-Region Length Effect of nLDMOS on ESD Ability with a TLP Testing System. GCCE (2019)
Sheng-Kai Fan, Shen-Li Chen, Yu-Lin Jhou, Pei-Lin Wu, Po-Lin Lin
Channel- & Drift Region's STI-Lengths Impacts of ESD Immunity in HV 60 V nLDMOS Devices. ICCE-TW (2019)
Sheng-Kai Fan, Shen-Li Chen, Yu-Lin Jhou, Pei-Lin Wu, Po-Lin Lin
ESD Immunity Impacts of the Drain-Side Heterojunction Device Addition in HV 60 V n/pLDMOS Devices. GCCE (2019)
Po-Lin Lin, Shen-Li Chen, Pei-Lin Wu, Yu-Lin Jhou, Sheng-Kai Fan
of an UHV Elliptical LDMOS-SCR by the Drain-Side Junction Replacement. ICCE-TW (2019)
Shen-Li Chen, Yi-Cih Wu
Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers. Sensors 18 (10) (2018)
Shen-Li Chen, Yu-Ting Huang, Shawn Chang
Design and Impact on ESD/LU Immunities by Drain-Side Super-Junction Structures in Low-(High-)Voltage MOSFETs for the Power Applications. IEICE Trans. Electron. (3) (2018)
Shen-Li Chen, Yu-Ting Huang, Yi-Cih Wu
Design of High-ESD Reliability in HV Power pLDMOS Transistors by the Drain-Side Isolated SCRs. IEICE Trans. Electron. (5) (2017)
Shen-Li Chen, Yu-Ting Huang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang
ESD protection design for the 45-V pLDMOS-SCR (p-n-p-arranged) devices with source-discrete distributions. GCCE (2016)
Shen-Li Chen, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin
Design on ESD robustness of source-side discrete distribution in the 60-V high-voltage nLDMOS devices. ICCE-TW (2016)
Shen-Li Chen, Dun-Ying Shu
By using grey system and Neural-Fuzzy Network methods to obtain the threshold voltage of submicron n-MOSFET DUTs. FSKD (2015)
Shen-Li Chen
Characteristic Prediction of BCD LV pMOSFET Devices Based on an ANFIS-Based Methodology. Adv. Fuzzy Syst. 2015 (2015)
Shen-Li Chen, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang
Anti-ESD impacts on 60-V P-channel LDMOS devices as none-ODs zone inserting in the bulk region. ICCE-TW (2015)
Shen-Li Chen, Yu-Ting Huang, Shawn Chang, Shun-Bao Chang
ESD reliability building in 0.25 μm 60-V p-channel LDMOS DUTs with different embedded SCRs. ICCE-TW (2015)