Masayuki Miyama

Publication Activity (10 Years)

Years Active: 2001-2022
Publications (10 Years): 3

Top Topics

Stereo Matching

Top Venues

IEICE Trans. Inf. Syst.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Masayuki Miyama
FPGA Implementation of 3-Bit Quantized Multi-Task CNN for Contour Detection and Disparity Estimation. IEICE Trans. Inf. Syst. (2) (2022)
Masayuki Miyama
HD 180 FPS FPGA Processor to Generate Depth Image with Clear Object Boundary. ISDCS (2019)
Masayuki Miyama
Fast stereo matching with super-pixels using one-way check and score filter. ICCSCE (2017)
Shunji Nakata, Hiroki Hanazono, Hiroshi Makino, Hiroki Morimura, Masayuki Miyama, Yoshio Matsuda
Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Shunji Nakata, Hiroshi Makino, Ryota Honda, Masayuki Miyama, Yoshio Matsuda
Analysis of voltage, Current and Energy dissipation of Stepwise Adiabatic Charging of a capacitor using a nonresonant inductor Current. J. Circuits Syst. Comput. 23 (3) (2014)
Shunji Nakata, Ryota Honda, Hiroshi Makino, Shin'ichiro Mutoh, Masayuki Miyama, Yoshio Matsuda
General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2012)
Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda
Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield. IET Circuits Devices Syst. 6 (4) (2012)
Masayuki Miyama, Yoshio Matsuda
Vehicle detection and tracking with affine motion segmentation in stereo video. ICSIPA (2011)
Hiroshi Makino, Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, Masayuki Miyama, Tsutomu Yoshimura, Shuhei Iwade, Yoshio Matsuda
Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution. IEEE Trans. Circuits Syst. II Express Briefs (4) (2011)
Katsumi Dosaka, Daisuke Ogawa, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda
A Complete Charge Recycling TCAM with Checkerboard Array Arrangement for Low Power Applications. IEICE Trans. Electron. (5) (2010)
Shunji Nakata, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda
Stable adiabatic circuit using advanced series capacitors and time variation of energy dissipation. IEICE Electron. Express 7 (9) (2010)
Shunji Nakata, Hirotsugu Suzuki, Ryota Honda, Takahito Kusumoto, Shin'ichiro Mutoh, Hiroshi Makino, Masayuki Miyama, Yoshio Matsuda
Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit. ISCAS (2010)
Shunji Nakata, Masayuki Miyama, Yoshio Matsuda
Adiabatic charging and discharging method with minimum energy dissipation for a variable-gap capacitor system. IET Circuits Devices Syst. 4 (4) (2010)
Yoshiki Yunbe, Masayuki Miyama, Yoshio Matsuda
A VGA 30 fps Affine Motion Model Estimation VLSI for Real-Time Video Segmentation. IEICE Trans. Inf. Syst. (12) (2010)
Shunji Nakata, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda
Adiabatic SRAM with a Large Margin of VT Variation by Controlling the Cell-power-line and Word-line Voltage. ISCAS (2009)
Masayuki Miyama, Yuusuke Inoie, Takafumi Kasuga, Ryouichi Inada, Masashi Nakao, Yoshio Matsuda
A 158 MS/s JPEG 2000 Codec with a Bit-Plane and Pass Parallel Embedded Block Coder for Low Delay Image Transmission. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2008)
Yuichiro Murachi, Yuki Fukuyama, Ryo Yamamoto, Junichi Miyakoshi, Hiroshi Kawaguchi, Hajime Ishihara, Masayuki Miyama, Yoshio Matsuda, Masahiko Yoshimoto
A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition. IEICE Trans. Electron. (4) (2008)
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Hideo Ohira, Masayuki Miyama, Masahiko Yoshimoto
A Feed-Forward Dynamic VDD-VBB-Frequency Management for Low Power Motion Video Compression on 90NM Risc Processor. Intell. Autom. Soft Comput. 12 (3) (2006)
Noriyuki Minegishi, Junichi Miyakoshi, Yuki Kuroda, Tadayoshi Katagiri, Yuki Fukuyama, Ryo Yamamoto, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
VLSI Architecture Study of a Real-Time Scalable Optical Flow Processor for Video Segmentation. IEICE Trans. Electron. (3) (2006)
Junichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto
A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Junichi Miyakoshi, Yuichiro Murachi, Koji Hamano, Tetsuro Matsuno, Masayuki Miyama, Masahiko Yoshimoto
A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation. IEICE Trans. Electron. (4) (2005)
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama, Masahiko Yoshimoto
Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Yuichiro Murachi, Koji Hamano, Tetsuro Matsuno, Junichi Miyakoshi, Masayuki Miyama, Masahiko Yoshimoto
A 95 mW MPEG2 MP@HL Motion Estimation Processor Core for Portable High-Resolution Video Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Yuki Kuroda, Junichi Miyakoshi, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
A sub-mW MPEG-4 motion estimation processor core for mobile video application. ASP-DAC (2004)
Masayuki Miyama, Junichi Miyakoshi, Yuki Kuroda, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
A sub-mW MPEG-4 motion estimation processor core for mobile video application. IEEE J. Solid State Circuits 39 (9) (2004)
Junichi Miyakoshi, Yuri Kuroda, Masayuki Miyama, Kosuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto
A sub-mW MPEG-4 motion estimation processor core for mobile video application. CICC (2003)
Masayuki Miyama, Osamu Tooyama, N. Takamatsu, T. Kodake, K. Nakamura, A. Kato, Junichi Miyakoshi, K. Hashimoto, Shigenobu Komatsu, M. Yagi, Masao Morimoto, Kazuo Taki, Masahiko Yoshimoto
An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm. CICC (2002)
Akira Watanabe, Osamu Tooyama, Masayuki Miyama, Masahiko Yoshimoto, Junichi Akita
An image sensor with fast extraction of objects' positions - rough vision processor. ICIP (2) (2001)