Hiroki Morimura

Publication Activity (10 Years)

Years Active: 1996-2019
Publications (10 Years): 4

Top Topics

Experimental Study

Fiber Bragg Grating

Wireless Sensor Nodes

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Ind. Electron.

Publications

Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya
A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery Management. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2019)
Ai-ichiro Sasaki, Olivier Ouellette, Maxime Beaudry-Marchand, Akihiko Hirata, Hiroki Morimura
Analysis and Experimental Study of Magnetic-Field Amplification by a Double Coil. IEEE Trans. Ind. Electron. 64 (4) (2017)
Teruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya
Design and Analysis of Ultra-Low Power Glitch-Free Programmable Voltage Detector Based on Multiple Voltage Copier. IEICE Trans. Electron. (4) (2017)
Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya
56-Level programmable voltage detector in steps of 50mV for battery management. A-SSCC (2016)
Ahmed Musa, Tadashi Minotani, Kenichi Matsunaga, Toshihiko Kondo, Hiroki Morimura
An 8-mode reconfigurable sensor-independent readout circuit for trillion sensors era. ISSNIP (2015)
Ahmed Musa, Tadashi Minotani, Toshihiko Kondo, Hiroki Morimura
A Wide Frequency PLL-less Clock Generator with Fast Intermittent Operation for Low-Power Wearable Medical Applications. APCC (2015)
Dan Luo, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Makoto Takamiya, Takayasu Sakurai
Analysis to optimize sensitivity of RF energy harvester with voltage boost circuit. ECCTD (2015)
Teruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya
248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvesting. ESSCIRC (2015)
Shunji Nakata, Hiroki Hanazono, Hiroshi Makino, Hiroki Morimura, Masayuki Miyama, Yoshio Matsuda
Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Hiroki Morimura, Shoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Mitsuru Harada
Ultra-low-power circuit techniques for mm-size wireless sensor nodes with energy harvesting. IEICE Electron. Express 11 (20) (2014)
Shunji Nakata, Ryota Honda, Hiroshi Makino, Hiroki Morimura, Yoshio Matsuda
Energy dissipation reduction during adiabatic charging and discharging with controlled inductor current. MWSCAS (2012)
Shoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Hiroki Morimura, Mitsuru Harada
event-driven wireless sensor nodes. ICCS (2012)
Toshishige Shimamura, Mamoru Ugajin, Kenji Suzuki, Kazuyoshi Ono, Norio Sato, Kei Kuwabara, Hiroki Morimura, Shin'ichiro Mutoh
Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applications. ISSCC (2010)
Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Mamoru Nakanishi, Katsuyuki Machida
Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIs. IEEE J. Solid State Circuits 45 (5) (2010)
Toshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi
A Fingerprint Sensor with Impedance Sensing for Fraud Detection. ISSCC (2008)
Satoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi
Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI. IEICE Trans. Electron. (10) (2007)
Satoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi
Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and Identifier. IEICE Trans. Electron. (4) (2006)
Satoshi Shigematsu, Hiroki Morimura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi
Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier. IEICE Trans. Electron. (5) (2005)
Hiroki Morimura, Satoshi Shigematsu, Toshishige Shimamura, Katsuyuki Machida, Hakaru Kyuragi
A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIs. IEEE J. Solid State Circuits 37 (10) (2002)
Koji Fujii, Mamoru Nakanishi, Satoshi Shigematsu, Hiroki Morimura, Takahiro Hatano, Namiko Ikeda, Toshishige Shimamura, Yukio Okazaki, Hakaru Kyuragi
A 500-dpi cellular-logic processing array for fingerprint-image enhancement and verification. CICC (2002)
Takahiro Hatano, Takuya Adachi, Satoshi Shigematsu, Hiroki Morimura, Shigehiko Onishi, Yukio Okazaki, Hakaru Kyuragi
A Fingerprint Verification Algorithm Using the Differential Matching Rate. ICPR (3) (2002)
Nobutaro Shibata, Hiroki Morimura, Mitsuru Harada
1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs. IEEE J. Solid State Circuits 35 (10) (2000)
Hiroki Morimura, Satoshi Shigematsu, Katsuyuki Machida
A novel sensor cell architecture and sensing circuit scheme for capacitive fingerprint sensors. IEEE J. Solid State Circuits 35 (5) (2000)
Nobutaro Shibata, Hiroki Morimura, Mayumi Watanabe
A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recycling input/output buffers. IEEE J. Solid State Circuits 34 (6) (1999)
Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka
A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells. ISLPED (1999)
Satoshi Shigematsu, Hiroki Morimura, Yasuyuki Tanabe, Takuya Adachi, Katsuyuki Machida
A single-chip fingerprint sensor and identifier. IEEE J. Solid State Circuits 34 (12) (1999)
Hiroki Morimura, Nobutaro Shibata
A step-down boosted-wordline scheme for 1-V battery-operated fast SRAM's. IEEE J. Solid State Circuits 33 (8) (1998)
Hiroki Morimura, Nobutaro Shibata
A 1-V 1-Mb SRAM for portable equipment. ISLPED (1996)