Login / Signup
Mayumi Watanabe
Publication Activity (10 Years)
Years Active: 1999-2017
Publications (10 Years): 1
Top Topics
Decision Trees
Low Power
Random Access
Top Venues
IEICE Trans. Electron.
</>
Publications
</>
Nobutaro Shibata
,
Mayumi Watanabe
,
Takako Ishihara
Dual-Port SRAM Macro for Serial Access Applications.
IEICE Trans. Electron.
(11) (2017)
Nobutaro Shibata
,
Mayumi Watanabe
,
Hideomi Okiyama
A High-Speed Low-Power Multi-VDD CMOS/SIMOX SRAM With LV-TTL Level Input/Output Pins - Write/Read Assist Techniques for 1-V Operated Memory Cells.
IEEE J. Solid State Circuits
45 (9) (2010)
Nobutaro Shibata
,
Mayumi Watanabe
,
Yasuyuki Tanabe
A current-sensed high-speed and low-power first-in-first-out memory using a wordline/bitline-swapped dual-port SRAM cell.
IEEE J. Solid State Circuits
37 (6) (2002)
Nobutaro Shibata
,
Mayumi Watanabe
,
Yasuhiro Sato
,
Takako Ishihara
,
Yukio Komine
A 2-V 300-MHz 1-Mb current-sensed double-density SRAM for low-power 0.3-μm CMOS/SIMOX ASICs.
IEEE J. Solid State Circuits
36 (10) (2001)
Nobutaro Shibata
,
Hiroki Morimura
,
Mayumi Watanabe
A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recycling input/output buffers.
IEEE J. Solid State Circuits
34 (6) (1999)