A 2-V 300-MHz 1-Mb current-sensed double-density SRAM for low-power 0.3-μm CMOS/SIMOX ASICs.
Nobutaro ShibataMayumi WatanabeYasuhiro SatoTakako IshiharaYukio KominePublished in: IEEE J. Solid State Circuits (2001)
Keyphrases
- low power
- high speed
- cmos technology
- power consumption
- low voltage
- low cost
- nm technology
- single chip
- wireless transmission
- high power
- low power consumption
- logic circuits
- vlsi circuits
- real time
- mixed signal
- image sensor
- vlsi architecture
- power saving
- power dissipation
- embedded systems
- gate array
- power management
- power reduction
- delay insensitive
- digital signal processing
- ultra low power