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Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI.

Satoshi ShigematsuHiroki MorimuraToshishige ShimamuraTakahiro HatanoNamiko IkedaYukio OkazakiKatsuyuki MachidaMamoru Nakanishi
Published in: IEICE Trans. Electron. (2007)
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