Christos Vezyrtzis

Publication Activity (10 Years)

Years Active: 2008-2020
Publications (10 Years): 13

Top Topics

Design Methodology

Top Venues

IEEE J. Solid State Circuits

Publications

Swagath Venkataramani, Xiao Sun, Naigang Wang, Chia-Yu Chen, Jungwook Choi, Mingu Kang, Ankur Agarwal, Jinwook Oh, Shubham Jain, Tina Babinsky, Nianzheng Cao, Thomas W. Fox, Bruce M. Fleischer, George Gristede, Michael Guillorn, Howard Haynie, Hiroshi Inoue, Kazuaki Ishizaki, Michael J. Klaiber, Shih-Hsien Lo, Gary W. Maier, Silvia M. Mueller, Michael Scheuermann, Eri Ogawa, Marcel Schaal, Mauricio J. Serrano, Joel Silberman, Christos Vezyrtzis, Wei Wang, Fanchieh Yee, Jintao Zhang, Matthew M. Ziegler, Ching Zhou, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Vijayalakshmi Srinivasan, Leland Chang, Kailash Gopalakrishnan
Efficient AI System Design With Cross-Layer Approximate Computing. Proc. IEEE 108 (12) (2020)
Christopher J. Berry, David Wolpert, Christos Vezyrtzis, Richard F. Rizzolo, Sean M. Carey, Yaniv Maroz, Hunter F. Shi, Dureseti Chidambarrao, Christian Jacobi, Anthony Saporito, Thomas Strach, Alper Buyuktosunoglu, Preetham Lobo, Pierce Chuang, Pawel Owczarczyk, Ramon Bertran, Tobias Webel, Phillip J. Restle
IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems. IEEE J. Solid State Circuits 54 (1) (2019)
Christos Vezyrtzis, Thomas Strach, Pierce I-Jen Chuang, Preetham Lobo, Richard F. Rizzolo, Tobias Webel, Pawel Owczarczyk, Alper Buyuktosunoglu, Ramon Bertran, David T. Hui, Susan M. Eickhoff, Michael S. Floyd, Gerard Salem, Sean M. Carey, Stelios G. Tsapepas, Phillip J. Restle
Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor. ISSCC (2018)
Christopher J. Gonzalez, Michael S. Floyd, Eric Fluhr, Phillip J. Restle, Daniel Dreps, Michael A. Sperling, Rahul M. Rao, David Hogenmiller, Christos Vezyrtzis, Pierce Chuang, Daniel Lewis, Ricardo Escobar, Vinod Ramadurai, Ryan Kruse, Juergen Pille, Ryan Nett, Pawel Owczarczyk, Joshua Friedrich, Jose Paredes, Timothy Diemoz, Md. Saiful Islam, Donald W. Plass, Paul Muench
The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4. IEEE J. Solid State Circuits 53 (1) (2018)
Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Vijayalakshmi Srinivasan, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan
A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference. VLSI Circuits (2018)
Christopher J. Berry, James D. Warnock, John Badar, Dean G. Bair, Erwin Behnen, Brian Bell, Alper Buyuktosunoglu, Chris Cavitt, Pierce Chuang, Ofer Geva, Dina Hamid, John Isakson, Preetham Lobo, Frank Malgioglio, Guenter Mayer, José Luis Neves, Thomas Strach, Jesse Surprise, Christos Vezyrtzis, Tobias Webel, David Wolpert
IBM z14 design methodology enhancements in the 14-nm technology node. IBM J. Res. Dev. 62 (2/3) (2018)
C. Zhou, Keith A. Jenkins, P. I. Chuang, Christos Vezyrtzis
Effect of HCI degradation on the variability of MOSFETS. IRPS (2018)
Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan
Across the Stack Opportunities for Deep Learning Acceleration. ISLPED (2018)
Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra
Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. ICCD (2017)
Michael S. Floyd, Phillip J. Restle, Michael A. Sperling, Pawel Owczarczyk, Eric J. Fluhr, Joshua Friedrich, Paul Muench, Timothy Diemoz, Pierce Chuang, Christos Vezyrtzis
26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection. ISSCC (2017)
Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
Very Low Voltage (VLV) Design. ICCD (2017)
Pierce I-Jen Chuang, Christos Vezyrtzis, Divya Pathak, Richard F. Rizzolo, Tobias Webel, Thomas Strach, Otto A. Torreiter, Preetham Lobo, Alper Buyuktosunoglu, Ramon Bertran, Michael S. Floyd, Malcolm S. Ware, Gerard Salem, Sean M. Carey, Phillip J. Restle
26.2 Power supply noise in a 22nm z13™ microprocessor. ISSCC (2017)
Bruce M. Fleischer, Christos Vezyrtzis, Karthik Balakrishnan, Keith A. Jenkins
A statistical critical path monitor in 14nm CMOS. ICCD (2016)
David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot
. VLSIC (2015)
Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick
Improving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)
Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis
A Flexible, Event-Driven Digital Filter With Frequency Response Independent of Input Sample Rate. IEEE J. Solid State Circuits 49 (10) (2014)
Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis
A flexible, clockless digital filter. ESSCIRC (2013)
Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick
Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications. ICCD (2012)
Christos Vezyrtzis, Aaron E. Klein, Dan Ellis, Yannis P. Tsividis
Direct processing of mpeg audio using companding and BFP techniques. ICASSP (2011)
Christos Vezyrtzis, Yannis P. Tsividis
Processing of Signals using Level-crossing Sampling. ISCAS (2009)
Peter R. Kinget, Christos Vezyrtzis, Ed Chiang, B. Hung, T. L. Li
Voltage references for ultra-low supply voltages. CICC (2008)