Otto A. Torreiter

Publication Activity (10 Years)

Years Active: 1997-2021
Publications (10 Years): 3

Top Topics

Silicon On Insulator

Ibm Zenterprise

Multichip Module

Top Venues

IBM J. Res. Dev.

Publications

Alexander Fritsch, Rajiv V. Joshi, Sudipto Chakraborty, Holger Wetter, Uma Srinivasan, Matthew Hyde, Otto A. Torreiter, Michael Kugel, Dan Radko, Hyong Kim, Daniel Friedman
24.1 A 6.2 GHz Single Ended Current Sense Amplifier (CSA) Based Compileable 8T SRAM in 7nm FinFET Technology. ISSCC (2021)
Pierce I-Jen Chuang, Christos Vezyrtzis, Divya Pathak, Richard F. Rizzolo, Tobias Webel, Thomas Strach, Otto A. Torreiter, Preetham Lobo, Alper Buyuktosunoglu, Ramon Bertran, Michael S. Floyd, Malcolm S. Ware, Gerard Salem, Sean M. Carey, Phillip J. Restle
26.2 Power supply noise in a 22nm z13™ microprocessor. ISSCC (2017)
P. Salz, A. Frisch, Wolfgang Penth, J. Noack, T. Kalla, Rolf Sautter, Michael Kugel, Otto A. Torreiter, G. Sapp, Mike Lee, Eric Fluhr, A. Rozenfeld, Jürgen Pille, Dieter F. Wendel
A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology. ESSCIRC (2017)
Alexander Fritsch, Michael Kugel, Rolf Sautter, Dieter F. Wendel, Juergen Pille, Otto A. Torreiter, Shankar Kalyanasundaram, Daniel A. Dobson
A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction. ESSCIRC (2015)
Thomas Strach, Frank E. Bosco, Kenneth L. Christian, Kevin R. Covi, Martin Eckert, Gregory R. Edlund, Roland Frech, Hubert Harrer, Andreas Huber, Dierk Kaller, Martin Kindscher, A. Z. Muszynski, G. A. Peterson, Claudio Siviero, Jochen Supper, Otto A. Torreiter, Thomas-Michael Winkel
Electronic packaging of the IBM System z196 enterprise-class server processor cage. IBM J. Res. Dev. 56 (1) (2012)
Jürgen Pille, Dieter F. Wendel, Otto Wagner, Rolf Sautter, Wolfgang Penth, Thomas Fröhnel, Stefan Büttner, Otto A. Torreiter, Martin Eckert, Jose Paredes, David Hrusecky, David Ray, Miles Canada
A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor. ISSCC (2010)
Juergen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel
Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V. IEEE J. Solid State Circuits 43 (1) (2008)
Jürgen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel
Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V. ISSCC (2007)
Franco Stellari, Peilin Song, John Hryckowian, Otto A. Torreiter, Steve Wilson, Philip Wu, Alberto Tosi
Characterization of a 0.13 mum CMOS Link Chip using Time Resolved Emission (TRE). Microelectron. Reliab. 45 (9-11) (2005)
Otto A. Torreiter, Ulrich Baur, Georg Goecke, Kevin Melocco
Multi Processor. ITC (1997)