Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V.
Jürgen PilleChad AdamsTodd ChristensenScott R. CottierSebastian EhrenreichFumihiro KonoDaniel NelsonOsamu TakahashiShunsako TokitoOtto A. TorreiterOtto WagnerDieter F. WendelPublished in: ISSCC (2007)
Keyphrases
- cmos technology
- silicon on insulator
- low power
- power consumption
- high speed
- cost effective
- future development
- dynamic random access memory
- addressing these issues
- nm technology
- object oriented technology
- rapid development
- data processing
- power dissipation
- low voltage
- primal dual
- computational power
- clock frequency
- efficient implementation
- main memory
- low cost