Yoichi Yoshida

Publication Activity (10 Years)

Years Active: 2008-2012
Publications (10 Years): 0

Top Topics

Simulated Annealing

Semiconductor Manufacturing

Power Transmission

Evolutionary Algorithm

Top Venues

IEICE Trans. Electron.

Publications

Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda
Wireless Power Transmission for Non-contact Wafer-Level Testing. IEICE Trans. Electron. (4) (2012)
Andrzej Radecki, Hayun Chung, Yoichi Yoshida, Noriyuki Miura, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda
inductive power transfer for non-contact wafer-level testing. ISSCC (2011)
Noriyuki Miura, Yasuhiro Take, Mitsuko Saito, Yoichi Yoshida, Tadahiro Kuroda
0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking. ISSCC (2011)
Yuxiang Yuan, Yoichi Yoshida, Tadahiro Kuroda
Analysis of Inductive Coupling and Design of Rectifier Circuit for Inter-Chip Wireless Power Link. IEICE Trans. Electron. (2) (2010)
Tsutomu Takeya, Kazuhisa Sunaga, Koichi Yamaguchi, Hideyuki Sugita, Yoichi Yoshida, Masayuki Mizuno, Tadahiro Kuroda
A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications. CICC (2010)
Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda
2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE J. Solid State Circuits 45 (1) (2010)
Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Masayuki Mizuno, Tadahiro Kuroda
An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing. IEEE J. Solid State Circuits 45 (10) (2010)
Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda
47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2010)
Shotaro Saito, Yoshinori Kohama, Yasufumi Sugimori, Yohei Hasegawa, Hiroki Matsutani, Toru Sano, Kazutaka Kasuga, Yoichi Yoshida, Kiichi Niitsu, Noriyuki Miura, Tadahiro Kuroda, Hideharu Amano
MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. FPL (2009)
Mitsuko Saito, Yasufumi Sugimori, Yoshinori Kohama, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda
47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking. CICC (2009)
Yasufumi Sugimori, Yoshinori Kohama, Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda
A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking. ISSCC (2009)
Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Tadahiro Kuroda, Masayuki Mizuno
Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing. ISSCC (2009)
Yoichi Yoshida, Noriyuki Miura, Tadahiro Kuroda
A 2 Gb/s Bi-Directional Inter-Chip Data Transceiver With Differential Inductors for High Density Inductive Channel Array. IEEE J. Solid State Circuits 43 (11) (2008)