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Mitsuko Saito
Publication Activity (10 Years)
Years Active: 2009-2013
Publications (10 Years): 0
Top Topics
Multithreading
Low Cost
Deductive Reasoning
Memory Space
Top Venues
IEEE J. Emerg. Sel. Topics Circuits Syst.
ISSCC
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Publications
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Noriyuki Miura
,
Mitsuko Saito
,
Masao Taguchi
,
Tadahiro Kuroda
A 6nW inductive-coupling wake-up transceiver for reducing standby power of non-contact memory card by 500×.
ISSCC
(2013)
Noriyuki Miura
,
Mitsuko Saito
,
Tadahiro Kuroda
/(TB/s) QDR Inductive-Coupling Interface Between 65-nm CMOS Logic and Emulated 100-nm DRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst.
2 (2) (2012)
Noriyuki Miura
,
Yasuhiro Take
,
Mitsuko Saito
,
Yoichi Yoshida
,
Tadahiro Kuroda
0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking.
ISSCC
(2011)
Noriyuki Miura
,
Kazutaka Kasuga
,
Mitsuko Saito
,
Tadahiro Kuroda
/Tb/s QDR inductive-coupling interface between 65nm CMOS GPU and 0.1µm DRAM.
ISSCC
(2010)
Mitsuko Saito
,
Noriyuki Miura
,
Tadahiro Kuroda
A 2Gb/s 1.8pJ/b/chip inductive-coupling through-chip bus for 128-Die NAND-Flash memory stacking.
ISSCC
(2010)
Mitsuko Saito
,
Yasufumi Sugimori
,
Yoshinori Kohama
,
Yoichi Yoshida
,
Noriyuki Miura
,
Hiroki Ishikuro
,
Takayasu Sakurai
,
Tadahiro Kuroda
2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking.
IEEE J. Solid State Circuits
45 (1) (2010)
Mitsuko Saito
,
Yoichi Yoshida
,
Noriyuki Miura
,
Hiroki Ishikuro
,
Tadahiro Kuroda
47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking.
IEEE Trans. Circuits Syst. I Regul. Pap.
(9) (2010)
Mitsuko Saito
,
Yasufumi Sugimori
,
Yoshinori Kohama
,
Yoichi Yoshida
,
Noriyuki Miura
,
Hiroki Ishikuro
,
Tadahiro Kuroda
47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking.
CICC
(2009)
Yasufumi Sugimori
,
Yoshinori Kohama
,
Mitsuko Saito
,
Yoichi Yoshida
,
Noriyuki Miura
,
Hiroki Ishikuro
,
Takayasu Sakurai
,
Tadahiro Kuroda
A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking.
ISSCC
(2009)