A 2Gb/s 1.8pJ/b/chip inductive-coupling through-chip bus for 128-Die NAND-Flash memory stacking.

Mitsuko Saito Noriyuki Miura Tadahiro Kuroda

Published in: ISSCC (2010)

Keyphrases

flash memory
high speed
low cost
solid state
garbage collection
buffer management
random access
embedded systems
main memory
database systems
file system
storage devices
single chip
disk drives
data storage
storage management
small size
b tree
storage systems
image sensor
database design
data management