0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking.
Noriyuki MiuraYasuhiro TakeMitsuko SaitoYoichi YoshidaTadahiro KurodaPublished in: ISSCC (2011)
Keyphrases
- flash memory
- garbage collection
- main memory
- solid state
- random access
- file system
- embedded systems
- buffer management
- low cost
- disk drives
- high speed
- database systems
- multi channel
- small size
- storage management
- data storage
- storage devices
- storage systems
- single chip
- b tree
- hand held devices
- memory management
- data management
- database management systems
- high density
- low power consumption