Junyan Ren

ORCID

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 111

Top Venues

Publications

Yuguo Xiang, Yutong Zhao, Dayan Zhou, Danfeng Zhai, Junyan Ren, Fan Ye
Hardware-Implemented Calibration Based on Sinusoidal Fitting for Hybrid Pipeline ADC. ISCAS (2024)
Yigang Wei, Tianxiang Wu, Shunli Ma, Junyan Ren
A Multi-channel 12-bits 100MS/s SAR ADC in 65nm CMOS. ASICON (2023)
Siqing Wu, Xinwei Yu, Xingtao Zhu, Fan Ye, Junyan Ren
A Three-stage Analog Low-Frequency Drift Calibration and DC Offset Correction Circuit for Ultrasonic AFE. ASICON (2023)
Yutong Zhao, Yuguo Xiang, Fan Ye, Junyan Ren
A 400-MS/s 12-bit Voltage-Time Hybrid ADC with a Ping-Pong SAR TDC for Speed Enhancement. ISCAS (2023)
Lei Wu, Junyan Ren, Tianxiang Wu, Shunli Ma
A 15GHz Class-C VCO with Two-stage Buffer in 0.15-μm GaAs. ASICON (2023)
Xi Wang, Dong Wei, Zhiyang Zhang, Tianxiang Wu, Xu Chen, Yong Chen, Junyan Ren, Shunli Ma
A 90- to 115-GHz superheterodyne receiver front-end for W-band imaging system in 28-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. 51 (4) (2023)
Bingrong Lyu, Fan Ye, Junyan Ren
A 6-Gb/s Wireline Transmitter Design with 3-Tap FFE in 28nm CMOS Technology. ASICON (2023)
Yujia Wang, Jincheng Zhang, Yong Chen, Junyan Ren, Shunli Ma
A 4.5-W, 18.5-24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique. IEEE Trans. Very Large Scale Integr. Syst. 31 (2) (2023)
Xinwei Yu, Yan Wang, Fan Ye, Junyan Ren
Low-Noise Low-Power Ultrasound AFE With Continuous TGC Built in Both TIA and Beamformer. IEEE Trans. Biomed. Circuits Syst. 17 (5) (2023)
Muxi Zou, Shunli Ma, Xiaodi Feng, Junyan Ren, Tianxiang Wu
A 300MS/s 57.6dB SNDR Single-Channel SAR ADC with Accelerated SAR Logic. ASICON (2023)
Xinwei Yu, Zhi Chen, Siqing Wu, Lulu Liu, Hao Chi, Fan Ye, Junyan Ren
28-nm CMOS Ultrasound AFE With Split Attenuation for Optimizing Gain-Range, Noise, and Area. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Zhiyang Zhang, Xi Wang, Junyan Ren, Shunli Ma
A Two-Way Current-Combining W-band Power Amplifier Achieving 17.4-dBm Output Power with 19.4% PAE in 65-nm Bulk CMOS. ISCAS (2022)
Jingchao Lan, Danfeng Zhai, Yongzhen Chen, Zhekan Ni, Xingchen Shen, Fan Ye, Junyan Ren
A 2.5-GS/s Time-Interleaved SAR-Assisted Ringamp-Based Pipelined ADC with Digital Background Calibration. ISCAS (2022)
Xi Wang, Zhiyang Zhang, Junyan Ren, Shunli Ma
A 134-154 GHz Low-Noise Amplifier Achieving 36.3-dB Maximum Gain with 3.8-dB Minimum Noise Figure for D-Band Imaging System. MWSCAS (2022)
Zhiyang Zhang, Xi Wang, Yong Chen, Junyan Ren, Shunli Ma
A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE. APCCAS (2022)
Tianxiang Wu, Xi Wang, Yong Chen, Junyan Ren, Shunli Ma
A 10-MHz to 50-GHz low-jitter multiphase clock generator for high-speed oscilloscope in 0.15-μm GaAs technology. Int. J. Circuit Theory Appl. 50 (2) (2022)
Xinwei Yu, Fan Ye, Junyan Ren
A Low Noise TIA with Continuous Time-Gain Compensation for Ultrasound Transducers. APCCAS (2022)
Zhiyang Zhang, Lihe Nie, Jincheng Zhang, Tianxiang Wu, Yong Chen, Junyan Ren, Shunli Ma
A 23- to 28-GHz 5-bit switch-type phase shifter with 1-bit calibration based on optimized ABCD matrix design methods for 5G MIMO system in 0.15-μm GaAs. Int. J. Circuit Theory Appl. 50 (6) (2022)
Wenhan Lu, Yimin Wu, Fan Ye, Junyan Ren
A Broadband LMS-based Band-split Crosstalk Cancellation Method for Ultrasound Systems. MWSCAS (2022)
Lulu Liu, Yimin Wu, Xinwei Yu, Fan Ye, Junyan Ren
A Branch-Gain-Balanced LNA Based on Voltage- Controlled Resistor Feedback and Shared CMFB Amplifier. MWSCAS (2022)
Danfeng Zhai, Wenning Jiang, Xinru Jia, Jingchao Lan, Mingqiang Guo, Sai-Weng Sin, Fan Ye, Qi Liu, Junyan Ren, Chixiao Chen
High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (12) (2022)
Jingchao Lan, Yuxuan Zhang, Fan Ye, Junyan Ren
A Single-Channel 1.25-GS/s 11-bit Pipelined ADC with Robust Floating-Powered Ring Amplifier and First-Order Gain Error Calibration. MWSCAS (2022)
Jincheng Zhang, Lihe Nie, Yong Chen, Junyan Ren, Shunli Ma
and 42% PAE. IEEE Trans. Circuits Syst. II Express Briefs 69 (11) (2022)
Leming He, Weijiang Xu, Yan Wang, Jia Zhou, Junyan Ren
Sensitivity - Bandwidth Optimization of PMUT with Acoustical Matching Using Finite Element Method. Sensors 22 (6) (2022)
Jingchao Lan, Yongzhen Chen, Xingchen Shen, Zhekan Ni, Yimin Wu, Fan Ye, Junyan Ren
Effective Gain Analysis and Statistic Based Calibration for Ring Amplifier With Robustness to PVT Variation. IEEE Trans. Circuits Syst. II Express Briefs 69 (2) (2022)
Yutong Zhao, Fan Ye, Junyan Ren
A 500-MS/s 9-Bit Time-Domain ADC Using a Nonbinary Successive Approximation TDC. APCCAS (2022)
Ziwei Li, Yutong Zhao, Guoyao Wu, Fan Ye, Junyan Ren
A Wide-Range 12b 150MS/s P-SAR ADC with Open-Loop Residue Amplifier for Ultrasound AFE. ASICON (2021)
Shunli Ma, Tianxiang Wu, Jincheng Zhang, Junyan Ren
A 5G Wireless Event-Driven Sensor Chip for Online Power-Line Disturbances Detecting Network in 0.25 μm GaAs Process. IEEE Trans. Ind. Electron. 68 (6) (2021)
Ziwei Li, Guoyao Wu, Yutong Zhao, Fan Ye, Junyan Ren
Resistive Degeneration Linearization Dynamic Residue Amplifiers for Pipelined ADCs. ISOCC (2021)
Guoyao Wu, Ziwei Li, Yutong Zhao, Fan Ye, Junyan Ren
A 5-bit High-Linearity, Binary-Recombination-Redundancy Sub-SAR ADC in 300MS/s, 14-bit Pipelined-SAR ADC. ASICON (2021)
Yan Zheng, Jingchao Lan, Fan Ye, Junyan Ren
A 12-bit 100MS/s SAR ADC With Equivalent Split-Capacitor and LSB-Averaging in 14-nm CMOS FinFET. IEEE Access 9 (2021)
Dong Wei, Tianxiang Wu, Shunli Ma, Yong Chen, Junyan Ren
A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio. ESSCIRC (2021)
Min Chen, Nuo Xu, Yutong Zhao, Fan Ye, Junyan Ren
A Hardware-Efficient Calibrator for SAR-Pipelined ADCs with a Layer-based Sharing Neural Network. MWSCAS (2021)
Min Chen, Yutong Zhao, Nuo Xu, Fan Ye, Junyan Ren
A Partially Binarized and Fixed Neural Network Based Calibrator for SAR-Pipelined ADCs Achieving 95.0-dB SFDR. ISCAS (2021)
Jingchao Lan, Yan Zheng, Yimin Wu, Min Chen, Fan Ye, Junyan Ren
A High Linearity Bootstrapped Switch with Leakage Current Suppressed for GS/s Sampling Rate ADC. ISOCC (2021)
Xubo Wang, Leming He, You-Cao Ma, Wenjuan Liu, Weijiang Xu, Junyan Ren, Antoine Riaud, Jia Zhou
Development of Broadband High-Frequency Piezoelectric Micromachined Ultrasonic Transducer Array. Sensors 21 (5) (2021)
Hao Chi, Jun Xu, Fan Ye, Junyan Ren
A High Linearity and Low Noise Anti-Aliasing Filter for ADCs. ASICON (2021)
Xi Wang, Junyan Ren, Shunli Ma
-order N-path Bandpass Filter with a Tuning Range of 1-30 GHz and OOB Rejection > 30 dB in 28 nm CMOS. ASICON (2021)
Jingchao Lan, Yan Zheng, Yimin Wu, Fan Ye, Junyan Ren
A Novel Ring Amplifier with Low Common-Mode Voltage Variation and Noise Reduction Using Floating Power Technique. MWSCAS (2021)
Wenbin He, Fan Ye, Junyan Ren
An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer. ISCAS (2021)
Danfeng Zhai, Chixiao Chen, Liang Qi, Fan Ye, Junyan Ren
Machine Learning based Prior-Knowledge-Free Nyquist ADC Characterization and Calibration. ISOCC (2021)
Jincheng Zhang, Tianxiang Wu, Yong Chen, Junyan Ren, Shunli Ma
A 3-to-78GHz Differential Distributed Amplifier with Ultra- Balanced Active Balun and Gain Boosting Techniques in 65-nm CMOS Process. A-SSCC (2021)
Dong Wei, Xuan Ding, Hai Yu, Yen-Cheng Kuan, Qun Jane Gu, Zhiwei Xu, Shunli Ma, Junyan Ren
Analysis and Design of a 35-GHz Hybrid π-Network High-Gain Phase Shifter With 360° Continuous Phase Shifting. IEEE Access 9 (2021)
Manxin Li, Yuting Yao, Biao Hu, Jipeng Wei, Yong Chen, Shunli Ma, Fan Ye, Junyan Ren
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS. IEEE Access 9 (2021)
Yan Zheng, Jingchao Lan, Fan Ye, Junyan Ren
A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet. ASICON (2021)
Yuefeng Cao, Shumin Zhang, Tianli Zhang, Yongzhen Chen, Yutong Zhao, Chixiao Chen, Fan Ye, Junyan Ren
A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (2) (2021)
Zhiyang Zhang, Junyan Ren, Shunli Ma
A C-Band Power Amplifier with Over-Neutralization Technique and Coupled-Line MCR Matching Methods for 5G Communication in 0.25-μm GaAs. ASICON (2021)
Danfeng Zhai, Peizhe Li, Jiushan Zhang, Chixiao Chen, Fan Ye, Junyan Ren
Additive Neural Network Based Static and Dynamic Distortion Modeling for Prior-Knowledge-Free Nyquist ADC Characterization. MWSCAS (2021)
Xu Chen, Junyan Ren, Shunli Ma
A 79GHz 5-bit Phase Shifter With π-Network in 28-nm CMOS. ASICON (2021)
Jingqi Wang, Fan Ye, Junyan Ren
A Three-Stage Comparator with High Speed and Low Power. ASICON (2021)
Jincheng Zhang, Tianxiang Wu, Lihe Nie, Shunli Ma, Yong Chen, Junyan Ren
for Sub-THz Imaging System. IEEE Access 9 (2021)
Shunli Ma, Yan Wang, Xinyu Chen, Tianxiang Wu, Xi Wang, Hongwei Tang, Yuting Yao, Hao Yu, Yaochen Sheng, Jingyi Ma, Junyan Ren, Wenzhong Bao
Materials With Physical and SPICE Model. IEEE Access 8 (2020)
Shunli Ma, Tianxiang Wu, Junyan Ren
A Quadrature PLL With Phase Mismatch Calibration for 32GS/s Time-Interleaved ADC. IEEE Access 8 (2020)
Min Chen, Yimin Wu, Jingchao Lan, Fan Ye, Chixiao Chen, Junyan Ren
A Calibration Scheme for Nonlinearity of the SAR-Pipelined ADCs Based on a Shared Neural Network. APCCAS (2020)
Wenbin He, Ziwei Li, Fan Ye, Junyan Ren
A Low Power Reference Voltage Buffer and High Density Unit capacitor in a 12b 200MS/s SAR ADC. APCCAS (2020)
Ziwei Li, Wenbin He, Fan Ye, Junyan Ren
A Low-Power Low-Noise Dynamic Comparator With Latch-Embedding Floating Amplifier. APCCAS (2020)
Fan Ye, Junyan Ren
A 12-bit SAR ADC Using Pseudo-Dynamic Weighting C-DAC for Capacitor Error Calibration. MWSCAS (2020)
Yimin Wu, Jingchao Lan, Min Chen, Fan Ye, Junyan Ren
A 16-channel 50MS/s 14bit Pipelined-SAR ADC for Integrated Ultrasound Imaging Systems. APCCAS (2020)
Yan Zheng, Fan Ye, Junyan Ren
A 13 Bit 100 MS/s SAR ADC with 74.57 dB SNDR in 14-nm CMOS FinFET. ISCAS (2020)
Jincheng Zhang, Lihe Nie, Shunli Ma, Junyan Ren
A 10-18 GHz GaN Power Amplifier Based on Asymmetric Magnetically Coupled Resonator. MWSCAS (2020)
Yimin Wu, Shuai Li, Longheng Luo, Fan Ye, Junyan Ren
An Area-Power-Efficient AFE with NS-SAR ADC For High-Frequency Ultrasound Applications. APCCAS (2020)
Wenbin He, Fan Ye, Junyan Ren
A Fast Response Reference Voltage Buffer for 12b 200MS/s SAR ADC. MWSCAS (2020)
Yongzhen Chen, Xingchen Shen, Zhekan Ni, Jingchao Lan, Chixiao Chen, Fan Ye, Junyan Ren
A 625MS/s, 12-Bit, SAR Assisted Pipeline ADC with Effective Gain Analysis for Inter-stage Ringamps. ESSCIRC (2019)
Jipeng Wei, Yuting Yao, Longheng Luo, Shunli Ma, Fan Ye, Junyan Ren
A Novel Nauta Transconductor for Ultra-Wideband gm-C Filter with Temperature Calibration. ISCAS (2019)
Shunli Ma, Hao Yu, Qun Jane Gu, Junyan Ren
A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2019)
Zhekan Ni, Yongzhen Chen, Fan Ye, Junyan Ren
A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic. Microelectron. J. 84 (2019)
Wenjuan Liu, Leming He, Xubo Wang, Jia Zhou, Weijiang Xu, Nikolay Smagin, Malika Toubal, Hao Yu, Yuandong Gu, Jinghui Xu, Denis Remiens, Junyan Ren
3D FEM Analysis of High-Frequency AlN-Based PMUT Arrays on Cavity SOI. Sensors 19 (20) (2019)
Longheng Luo, Xingchen Shen, Jianguo Diao, Fan Ye, Junyan Ren
A Comparator-Reused Dynamic-Amplifier for Noise-Shaping SAR ADC. ASICON (2019)
Wenbin He, Fan Ye, Junyan Ren
A 40Gb/s Low Power Transmitter with 2-tap FFE and 40: 1 MUX in 28nm CMOS Technology. ASICON (2019)
Longheng Luo, Shuai Li, Jipeng Wei, Yimin Wu, Fan Ye, Junyan Ren
A Band-Pass Noise-Shaping Modulator Using the Error-Feedback Structure on a 10-bit SAR ADC. MWSCAS (2019)
Shuai Li, Jianguo Diao, Yimin Wu, Fan Ye, Junyan Ren
A 20MHz Bandwidth Band-Pass Noise-Shaping SAR ADC With OPAMP Sharing Switched-Capacitor Filter. MWSCAS (2019)
Fan Ye, Shuai Li, Min Zhu, Zhekan Ni, Junyan Ren
A 13-bit 180-MS/s SAR ADC with Efficient Capacitor-Mismatch Estimation and Dither Enhancement. ISCAS (2019)
Jianguo Diao, Shuai Li, Yimin Wu, Fan Ye, Jun Xu, Junyan Ren
Energy-Efficient Analog Frond-End Design for Ultrasound Imaging Applications. MWSCAS (2019)
Yuting Yao, Manxin Li, Tianxiang Wu, Hu Xu, Shunli Ma, Wenzhong Bao, Junyan Ren
SPICE Modeling and Simulation of High-Performance Wafer-Scale MoS2 Transistors. ASICON (2019)
Dong Wei, Xuan Ding, Hai Yu, Bo Yu, Shunli Ma, Qun Jane Gu, Junyan Ren
A 140 GHz, 4 dB Noise-Figure Low-Noise Amplifier Design with the Compensation of Parasitic Capacitance CGS. MWSCAS (2019)
Jincheng Zhang, Lihe Nie, Dong Wei, Tianxiang Wu, Shunli Ma, Junyan Ren
A 130-150 GHz Power Amplifier for Millimeter Wave Imaging in 65-nm CMOS. ASICON (2019)
Dong Wei, Jincheng Zhang, Tianxiang Wu, Shunli Ma, Junyan Ren
A 22-40.5 GHz UWB LNA Design in 0.15um GaAs. ASICON (2019)
Tianxiang Wu, Jincheng Zhang, Dong Wei, Lihe Nie, Yuting Yao, Shunli Ma, Junyan Ren
A 36-40 GHz VCO with bonding inductors for millimeter wave 5G Communication. ASICON (2019)
Longheng Luo, Yimin Wu, Jipeng Wei, Fan Ye, Junyan Ren
A Capacitively-Degenerated High-Linearity Dynamic Amplifier using a Real-Time Gain Detection Technique. ISCAS (2019)
Shumin Zhang, Yuefeng Cao, Fan Ye, Junyan Ren
A 10b 250MS/s SAR ADC with Speed-Enhanced SAR Logic and Free Time More Than a Half of Sampling Period. ASICON (2019)
Tianli Zhang, Yuefeng Cao, Shumin Zhang, Chixiao Chen, Fan Ye, Junyan Ren
Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR. ESSCIRC (2019)
Yuting Yao, Jipeng Wei, Manxin Li, Shunli Ma, Fan Ye, Junyan Ren
A 256MHz Analog Baseband Chain with tunable Bandwidth and Gain for UWB Receivers. ASICON (2019)
Yimin Wu, Jingchao Lan, Shuai Li, Fan Ye, Junyan Ren
A Ring Amplifier Based Current Feedback Continuous Time PGA for High Frequency Ultrasound Applications. MWSCAS (2019)
Zhiyuan Dai, Hang Hu, Yimin Wu, Fan Ye, Junyan Ren
A Third-order Band-pass Fully-passive Noise-Shaping Modulator Based on a Time-interleaved SAR ADC. MWSCAS (2018)
Shunli Ma, Ning Li, Junyan Ren
A 5-to-8-GHz Wideband Miniaturized Dielectric Spectroscopy Chip With $I/Q$ Mismatch Calibration in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26 (8) (2018)
Yongzhen Chen, Jingjing Wang, Hang Hu, Fan Ye, Junyan Ren
A Time-Interleaved SAR Assisted Pipeline ADC With a Bias-Enhanced Ring Amplifier. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Yuefeng Cao, Tianli Zhang, Yongzhen Chen, Fan Ye, Junyan Ren
An Operational Amplifier Assisted Input Buffer and An Improved Bootstrapped Switch for High-Speed and High-Resolution ADCs. ISCAS (2018)
Yuefeng Cao, Yongzhen Chen, Zhekan Ni, Fan Ye, Junyan Ren
An 11b 80MS/s SAR ADC With Speed-Enhanced SAR Logic and High-Linearity CDAC. APCCAS (2018)
Yongzhen Chen, Fan Ye, Junyan Ren
An 8.2 fJ/conversion-step 9-bit 135 MS/s SAR ADC with redundant methods for acceleration. Microelectron. J. 73 (2018)
Manxin Li, Yongzhen Chen, Fan Ye, Junyan Ren
A 100MS/S 12-bit Coarse-Fine SAR ADC with Shared Split-CDAC. ISCAS (2018)
Tianli Zhang, Yuefeng Cao, Fan Ye, Junyan Ren
Use Multilayer Perceptron in Calibrating Multistage Non-linearity of Split Pipelined-ADC. ISCAS (2018)
Zhekan Ni, Yongzhen Chen, Fan Ye, Junyan Ren
A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic. APCCAS (2018)
Yongzhen Chen, Zhekan Ni, Yuefeng Cao, Fan Ye, Junyan Ren
A 800 MS/s, 12-Bit, Ringamp-Based SAR assisted Pipeline ADC with Gain Error Cancellation. ISCAS (2018)
Zhiyuan Dai, Hang Hu, Yongzhen Chen, Fan Ye, Junyan Ren
A 12-Bit ENOB 8MHz BW Noise-Shaping SAR ADC Using High-Speed Switches. MWSCAS (2018)
Longheng Luo, Yimin Wu, Jianguo Diao, Fan Ye, Junyan Ren
Low Power Low Noise Amplifier with DC Offset Correction at 1 V Supply Voltage for Ultrasound Imaging Systems. MWSCAS (2018)
Manxin Li, Hang Hu, Zhiyuan Dai, Fan Ye, Junyan Ren
A 12bit asynchronous SAR-incremental sub-range ADC. ASICON (2017)
Yongzhen Chen, Jingjing Wang, Hang Hu, Fan Ye, Junyan Ren
A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier. ISCAS (2017)
Hang Hu, Zemin Feng, Chixiao Chen, Fan Ye, Junyan Ren
High speed digital ELD compensation with hybrid thermometer coding in CT ΔΣ modulators. MWSCAS (2017)
Hang Hu, Zhiyuan Dai, Manxin Li, Fan Ye, Junyan Ren
A 320MS/s 7-b flash-SAR ADC with preamplifier sharing technique. ASICON (2017)
Fubiao Cao, Yongzhen Chen, Zhiyuan Dai, Fan Ye, Junyan Ren
An input buffer for 12bit 2GS/s ADC. ASICON (2017)

Junyan Ren.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Junyan Ren