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Manxin Li
ORCID
Publication Activity (10 Years)
Years Active: 2017-2024
Publications (10 Years): 13
Top Topics
High Speed
Delta Sigma
Database Manager
Synthetic Aperture Radar
Top Venues
ASICON
ISCAS
ISSCC
IEEE J. Solid State Circuits
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Publications
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Manxin Li
,
Runpeng Gao
,
Calder Wilson
,
Amartya Basak
,
Evan C. Markwell
,
Matthew L. Johnston
,
Un-Ku Moon
An Easy-to-Drive Discrete-Time ADC Topology Using Digital Predictive Level-Shifting.
ISCAS
(2024)
Manxin Li
,
Calvin Yoji Lee
,
Ahmed ElShater
,
Yuichi Miyahara
,
Kazuki Sobue
,
Koji Tomioka
,
Un-Ku Moon
A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting.
ISSCC
(2023)
Manxin Li
,
Calvin Yoji Lee
,
Hanyu Wang
,
Gabor C. Temes
,
Un-Ku Moon
A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC.
ISCAS
(2023)
Manxin Li
,
Calvin Yoji Lee
,
Praveen Kumar Venkatachala
,
Ahmed ElShater
,
Yuichi Miyahara
,
Kazuki Sobue
,
Koji Tomioka
,
Un-Ku Moon
A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting.
IEEE J. Solid State Circuits
58 (12) (2023)
Manxin Li
,
Yuting Yao
,
Biao Hu
,
Jipeng Wei
,
Yong Chen
,
Shunli Ma
,
Fan Ye
,
Junyan Ren
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS.
IEEE Access
9 (2021)
Yuting Yao
,
Manxin Li
,
Tianxiang Wu
,
Hu Xu
,
Shunli Ma
,
Wenzhong Bao
,
Junyan Ren
SPICE Modeling and Simulation of High-Performance Wafer-Scale MoS2 Transistors.
ASICON
(2019)
Yuting Yao
,
Jipeng Wei
,
Manxin Li
,
Shunli Ma
,
Fan Ye
,
Junyan Ren
A 256MHz Analog Baseband Chain with tunable Bandwidth and Gain for UWB Receivers.
ASICON
(2019)
Manxin Li
,
Yongzhen Chen
,
Fan Ye
,
Junyan Ren
A 100MS/S 12-bit Coarse-Fine SAR ADC with Shared Split-CDAC.
ISCAS
(2018)
Manxin Li
,
Hang Hu
,
Zhiyuan Dai
,
Fan Ye
,
Junyan Ren
A 12bit asynchronous SAR-incremental sub-range ADC.
ASICON
(2017)
Hang Hu
,
Zhiyuan Dai
,
Manxin Li
,
Fan Ye
,
Junyan Ren
A 320MS/s 7-b flash-SAR ADC with preamplifier sharing technique.
ASICON
(2017)
Zhiyuan Dai
,
Hang Hu
,
Manxin Li
,
Fan Ye
,
Junyan Ren
A 0.87 mW 7MHz-BW 76dB-SNDR passive noise-shaping modulator based on a SAR ADC.
ASICON
(2017)
Hang Hu
,
Manxin Li
,
Zhiyuan Dai
,
Fan Ye
,
Junyan Ren
A 15MHz BW continuous-time ΔΣ modulator with high speed digital ELD compensation.
ASICON
(2017)
Yimin Wu
,
Yongzhen Chen
,
Manxin Li
,
Fan Ye
,
Junyan Ren
A stacked-packaged 16-channel ADC for ultrasound application.
ASICON
(2017)