A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier.

Yongzhen Chen Jingjing Wang Hang Hu Fan Ye Junyan Ren

Published in: ISCAS (2017)

Keyphrases

analog to digital converter
synthetic aperture radar
high sensitivity
sar images
multiscale
parameter estimation
high power
synthetic aperture radar images
pipeline architecture