A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package.
Shunli MaHao YuQun Jane GuJunyan RenPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
- high speed
- gigabit ethernet
- user friendly
- low cost
- high density
- ibm zenterprise
- fiber optic
- multiple sources
- power consumption
- ibm power processor
- analog vlsi
- software package
- high bandwidth
- hd video
- direct manipulation
- input output
- low power
- main memory
- circuit design
- vlsi implementation
- asynchronous communication
- real time
- user interface
- evolutionary algorithm
- database systems