A 5-bit High-Linearity, Binary-Recombination-Redundancy Sub-SAR ADC in 300MS/s, 14-bit Pipelined-SAR ADC.
Guoyao WuZiwei LiYutong ZhaoFan YeJunyan RenPublished in: ASICON (2021)
Keyphrases
- analog to digital converter
- synthetic aperture radar
- sar images
- gray code
- binary representation
- logical operations
- wide range
- error correcting codes
- bit string
- image reconstruction
- run length
- parameter estimation
- building blocks
- synthetic aperture radar images
- automatic target recognition
- multi class
- image processing