Jhih-Rong Gao

Publication Activity (10 Years)

Years Active: 2007-2020
Publications (10 Years): 6

Top Topics

Special Session

Planning Problems

Electron Beam Lithography

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan
MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (6) (2018)
Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu
A unified framework for simultaneous layout decomposition and mask optimization. ICCAD (2017)
Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan
EBL Overlapping Aware Stencil Planning for MCC System. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan
PARR: Pin-Access Planning and Regular Routing for Self-Aligned Double Patterning. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan
MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes. ICCAD (2016)
Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, David Z. Pan, Moshe Preil, Azat Latypov
Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design. ACM Great Lakes Symposium on VLSI (2015)
Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan
PARR: pin access planning and regular routing for self-aligned double patterning. DAC (2015)
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Yibo Lin, Zhuo Li, Charles J. Alpert, David Z. Pan
Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (5) (2015)
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System. CoRR (2015)
Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting (JM3 Special Session). CoRR (2014)
Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan
MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction. DAC (2014)
Bei Yu, Jhih-Rong Gao, David Z. Pan
Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting. CoRR (2014)
Jhih-Rong Gao, Bei Yu, David Z. Pan
Lithography Hotspot Detection and Mitigation in Nanometer VLSI. CoRR (2014)
Jhih-Rong Gao, Bei Yu, Ru Huang, David Z. Pan
Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement. CoRR (2014)
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan
Methodology for standard cell compliance and detailed placement for triple patterning lithography. CoRR (2014)
Bei Yu, Jhih-Rong Gao, David Z. Pan
L-Shape based Layout Fracturing for E-Beam Lithography. CoRR (2014)
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System. CoRR (2014)
Jhih-Rong Gao, Bei Yu, David Z. Pan
Self-aligned double patterning layout decomposition with complementary e-beam lithography. ASP-DAC (2014)
Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan
Methodology for standard cell compliance and detailed placement for triple patterning lithography. ICCAD (2013)
David Z. Pan, Bei Yu, Jhih-Rong Gao
Design for Manufacturing With Emerging Nanolithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (10) (2013)
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system. DAC (2013)
Bei Yu, Jhih-Rong Gao, David Z. Pan
L-shape based layout fracturing for e-beam lithography. ASP-DAC (2013)
Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan
Lithography hotspot detection and mitigation in nanometer VLSI. ASICON (2013)
Jhih-Rong Gao, David Z. Pan
Flexible self-aligned double patterning aware detailed routing with prescribed layout planning. ISPD (2012)
Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan
Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper). ICCAD (2012)
David Z. Pan, Jhih-Rong Gao, Bei Yu
VLSI CAD for emerging nanolithography. VLSI-DAT (2012)
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection. DAC (2011)
Yen-Jung Chang, Yu-Ting Lee, Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang
NTHU-Route 2.0: A Robust Global Router for Modern Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang
A new global router for modern designs. ASP-DAC (2008)
Pei-Ci Wu, Jhih-Rong Gao, Ting-Chi Wang
A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction. ASP-DAC (2007)