Hong-Yi Huang

Publication Activity (10 Years)

Years Active: 1993-2023
Publications (10 Years): 15

Top Topics

Text Generation

Top Venues

CLEF (Working Notes)

Publications

Hong-Yi Huang, Jen-Chieh Liu, Fu-Chien Tsai, Kun-Hua Lee, Kun-Yuan Chen
A 12-Phase and 5-GHz PLL with a Subfeedback Loop Technique. Circuits Syst. Signal Process. 42 (4) (2023)
Hong-Yi Huang, Chun-Wei Wu, Nieva M. Mapula
RF Energy Harvesting with Wide Input Power Range. ICECS (2023)
Kuo-Hsing Cheng, Chun-Yao Chang, Hong-Yi Huang, Yun-Teng Shih
A Low Power 16 Gbps CTLE and Quarter-Rate DFE With Single Adaptive System. ICECS (2023)
Shih-Hung Wu, Hong-Yi Huang
SimpleText Best of Labs in CLEF-2022: Simplify Text Generation with Prompt Engineering. CLEF (2023)
Hong-Yi Huang, Yu-Ming Tsao, Angelo Nico M. Daroy, Kuo-Hsing Cheng
A 1~50mA 20ns Settling Time Low Dropout Regulator. ICECS (2023)
Shih-Hung Wu, Hong-Yi Huang
A Prompt Engineering Approach to Scientific Text Simplification: CYUT at SimpleText2023 Task3. CLEF (Working Notes) (2023)
Harreez M. Villaruz, Hong-Yi Huang, Nieva M. Mapula, Gene Fe P. Palencia
Buck Converter with Variable Output Voltage for Dynamic Voltage Scaling (DVS) Applications. ISCIT (2023)
Shih-Hung Wu, Hong-Yi Huang
CYUT Team2 SimpleText Shared Task Report in CLEF-2022. CLEF (Working Notes) (2022)
Hugo Cruz, Hong-Yi Huang, Ching-Hsing Luo, Shuenn-Yuh Lee
A 2.5 mW/ch, 50 Mcps, 10-Analog Channel, Adaptively Biased Read-Out Front-End IC With Low Intrinsic Timing Resolution for Single-Photon Time-of-Flight PET Applications With Time-Dependent Noise Analysis in 90 nm CMOS. IEEE Trans. Biomed. Circuits Syst. 11 (2) (2017)
Hugo Cruz, Hong-Yi Huang, Ching-Hsing Luo, Lih-Yih Chiou, Shuenn-Yuh Lee
A novel clock-pulse-width calibration technique for charge redistribution DACs. ISCAS (2017)
Yo-Hao Tu, Kuo-Hsing Cheng, Wei-Ren Wang, Jen-Chieh Liu, Hong-Yi Huang
A chaotically injected timing technique for ring-based oscillators. DDECS (2016)
Hong-Yi Huang, Kun-Yuan Chen, Jia-Hao Xie, Ming-Ta Lee, Hao-Chiao Hong, Kuo-Hsing Cheng
Gm-C filter with automatic calibration scheme. DDECS (2016)
Yi-Hsiang Juan, Hong-Yi Huang, Shin-Chi Lai, Wen-Ho Juang, Shuenn-Yuh Lee, Ching-Hsing Luo
A Distortion Cancelation Technique With the Recursive DFT Method for Successive Approximation Analog-to-Digital Converters. IEEE Trans. Circuits Syst. II Express Briefs (2) (2016)
Hong-Yi Huang, Shao-Zu Yen, Jhen-Hong Chen, Hao-Chiao Hong, Kuo-Hsing Cheng
Low-voltage indoor energy harvesting using photovoltaic cell. DDECS (2016)
Yo-Hao Tu, Jen-Chieh Liu, Kuo-Hsing Cheng, Hong-Yi Huang, Chang-Chien Hu
A 0.6-V 1.6-GHz 8-phase all digital PLL using multi-phase based TDC. IEICE Electron. Express 13 (2) (2016)
Yo-Hao Tu, Kuo-Hsing Cheng, Yian-An Lin, Hong-Yi Huang
A Synchronous Mirror Delay with Duty-Cycle Tunable Technology. DDECS (2015)
Hong-Yi Huang, Gene Fe Palencia, Da-Kai Chen, Wei-Hsuan Huang
Triangular Modulation Using Switched-Capacitor Scheme for Spread-Spectrum Clocking. DDECS (2015)
Hugo Cruz, Hong-Yi Huang, Shuenn-Yuh Lee, Ching-Hsing Luo
A 1.3 mW low-IF, current-reuse, and current-bleeding RF front-end for the MICS band with sensitivity of -97 dbm. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2015)
Hong-Yi Huang, Jen-Chieh Liu, Pei-Ying Lee, Kun-Yuan Chen, Jin-Sheng Chen, Kuo-Hsing Cheng, Tzuen-Hsi Huang, Ching-Hsing Luo, Jin-Chern Chiou
PVT Insensitive High-Resolution Time to Digital Converter for Intraocular Pressure Sensing. DDECS (2015)
Hugo Cruz, Hong-Yi Huang, Shueen-Yu Lee, Ching-Hsing Luo
A 2.5 mW/ch, 50 Mcps, 10-analog channel, adaptively biased read-out front-end IC with 9.71 ps-RMS timing resolution for single-photon time-of-flight PET applications in 90 nm CMOS. VLSI-DAT (2015)
Yo-Hao Tu, Kuo-Hsing Cheng, Chih-Hsun Hsu, Hong-Yi Huang
A low supply voltage synchronous mirror delay with quadrature phase output. DDECS (2014)
Jen-Chieh Liu, Huan-Ke Chiu, Jia-Hung Peng, Yuan-Hua Chu, Hong-Yi Huang
A radio-controlled receiver for clocks/watches and alarm applications. ISCAS (2014)
Hugo Cruz, Hong-Yi Huang, Shuenn-Yuh Lee, Ching-Hsing Luo
Analysis and design of a 1.3-mW current-reuse RF front-end for the MICS band. ISCAS (2014)
Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng
A 64-MHz∼640-MHz 64-phase clock generator. DDECS (2014)
Hong-Yi Huang, Chinet Otic Mocorro, Julyver Pinaso, Kuo-Hsing Cheng
Indoor energy harvesting using photovoltaic cell for battery recharging. DDECS (2013)
Chih-Yuan Chen, Chia-Lin Chang, Chih-Wei Chang, Shin-Chi Lai, Tsung-Fu Chien, Hong-Yi Huang, Jin-Chern Chiou, Ching-Hsing Luo
A Low-Power Bio-Potential Acquisition System with Flexible PDMS Dry Electrodes for Portable Ubiquitous Healthcare Applications. Sensors 13 (3) (2013)
Yo-Hao Tu, Kuo-Hsing Cheng, Hsiang-Yun Wei, Hong-Yi Huang
A low jitter delay-locked-loop applied for DDR4. DDECS (2013)
Hui-Wen Chang, Hong-Yi Huang, Yi-Hsiang Juan, Wei-Song Wang, Ching-Hsing Luo
Adaptive successive approximation ADC for biomedical acquisition system. Microelectron. J. 44 (9) (2013)
Hong-Yi Huang, Cheng-Yu Chen, Kuo-Hsing Cheng
External capacitorless low dropout linear regulator using cascode structure. DDECS (2013)
Yi-Hsiang Juan, Ching-Hsing Luo, Hong-Yi Huang
A low voltage sigma delta modulator for temperature sensor. DDECS (2012)
Wei-Jhe Ma, Ching-Hsing Luo, Hong-Yi Huang
A low power analog front-end (AFE) circuit dedicated for driving bio-electrochemical sensors and peripheral devices. BioCAS (2012)
Hong-Yi Huang, Shiun-Dian Jan, Yang Chou, Cheng-Yu Chen
CMOS Differential Circuits Using Charge-Redistribution and Reduced-Swing Schemes. IEICE Trans. Electron. (2) (2012)
Hong-Yi Huang, Chun-Chieh Wu, Ching-Hsing Luo
An MICS band frequency synthesizer using active inductor and auto-calibration scheme. Microelectron. J. 43 (8) (2012)
Chiung-An Chen, Shih-Lun Chen, Hong-Yi Huang, Ching-Hsing Luo
An Efficient Micro Control Unit with a Reconfigurable Filter Design for Wireless Body Sensor Networks (WBSNs). Sensors 12 (12) (2012)
Kuo-Hsing Cheng, Jen-Chieh Liu, Hong-Yi Huang
A 0.6-V 800-MHz All-Digital Phase-Locked Loop With a Digital Supply Regulator. IEEE Trans. Circuits Syst. II Express Briefs (12) (2012)
Tzu-Chi Huang, Hong-Yi Huang, Jen-Chieh Liu, Kuo-Hsing Cheng, Ching-Hsing Luo
All digital phase-locked loop using active inductor oscillator and novel locking algorithm. ISCAS (2011)
Chiung-An Chen, Shih-Lun Chen, Hong-Yi Huang, Ching-Hsing Luo
An Asynchronous Multi-Sensor Micro Control Unit for Wireless Body Sensor Networks (WBSNs). Sensors 11 (7) (2011)
Hong-Yi Huang, Ruei-Iun Pu
Differential bidirectional transceiver for on-chip long wires. Microelectron. J. 42 (11) (2011)
Kuo-Hsing Cheng, Jen-Chieh Liu, Hong-Yi Huang, Yu-Liang Li, Yong-Jhen Jhu
A 6-GHz Built-in Jitter Measurement Circuit Using Multiphase Sampler. IEEE Trans. Circuits Syst. II Express Briefs (8) (2011)
Shih-Lun Chen, Hong-Yi Huang, Ching-Hsing Luo
Time Multiplexed VLSI Architecture for Real-Time Barrel Distortion Correction in Video-Endoscopic Images. IEEE Trans. Circuits Syst. Video Technol. 21 (11) (2011)
Shih-Lun Chen, Hong-Yi Huang, Ching-Hsing Luo
A Low-Cost High-Quality Adaptive Scalar for Real-Time Multimedia Applications. IEEE Trans. Circuits Syst. Video Technol. 21 (11) (2011)
Wei-Song Wang, Hong-Yi Huang, Shu-Chun Chen, Kuo-Chuan Ho, Chia-Yu Lin, Tse-Chuan Chou, Chih-Hsien Hu, Wen-Fong Wang, Cheng-Feng Wu, Ching-Hsing Luo
Real-Time Telemetry System for Amperometric and Potentiometric Electrochemical Sensors. Sensors 11 (9) (2011)
Shiann-Rong Kuang, Jiun-Ping Wang, Hong-Yi Huang
Variable-Latency Floating-Point Multipliers for Low-Power Applications. IEEE Trans. Very Large Scale Integr. Syst. 18 (10) (2010)
Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang
A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop. DDECS (2010)
Chia-Lin Chang, Chih-Wei Chang, Hong-Yi Huang, Chen-Ming Hsu, Chia-Hsuan Huang, Jin-Chern Chiou, Ching-Hsing Luo
A Power-Efficient Bio-Potential Acquisition Device with DS-MDE Sensors for Long-Term Healthcare Monitoring Applications. Sensors 10 (5) (2010)
Wei-Song Wang, Wei-Ting Kuo, Hong-Yi Huang, Ching-Hsing Luo
Wide Dynamic Range CMOS Potentiostat for Amperometric Chemical Sensor. Sensors 10 (3) (2010)
Shih-Lun Chen, Ho-Yin Lee, Chiung-An Chen, Hong-Yi Huang, Ching-Hsing Luo
Wireless Body Sensor Network With Adaptive Low-Power Design for Biometrics and Healthcare Applications. IEEE Syst. J. 3 (4) (2009)
Hong-Yi Huang, Fu-Chien Tsai
Analysis and optimization of ring oscillator using sub-feedback scheme. DDECS (2009)
Jen-Chieh Liu, Hong-Yi Huang, Wei-Bin Yang, Kuo-Hsing Cheng
0.5V 160-MHz 260uW all digital phase-locked loop. DDECS (2009)
Hong-Yi Huang, Chia-Ming Liang, Shi-Jia Sun
Low-power 50% duty cycle corrector. ISCAS (2008)
Wei-Chen Huang, Chen-Ming Hsu, Chien-Ming Lee, Hong-Yi Huang, Ching-Hsing Luo
Dual band LNA/mixer using conjugate matching for implantable biotelemetry. ISCAS (2008)
Hong-Yi Huang, Chia-Ming Liang
Frequency multiplier using 50% duty cycle corrector. IEICE Electron. Express 5 (22) (2008)
Hong-Yi Huang, Chun-Tsai Hung, Sheng-Chia Chiang
CMOS bulk input current switch logic circuit. ICECS (2008)
Hong-Yi Huang, Ru-Jie Wang, Shih-Chiang Hsu
Piecewise linear curvature-compensated CMOS bandgap reference. ICECS (2008)
Hong-Yi Huang, Li-Wei Huang, Wei-Sheng Tseng, Chih-Yuan Hsu
A 6-Gbit/s SATA spread-spectrum clock generator using two-stage delta-sigma modulator. SoCC (2008)
Hong-Yi Huang, Ruei-Iun Pu, Ming-Ta Lee
Simultaneous bidirectional transceiver with impedance matching. ICECS (2008)
Hong-Yi Huang, Yi-Jui Tsai, Kung-Liang Ho, Chan-Yu Lin
All digital time-to-digital converter using single delay-locked loop. SoCC (2008)
Hong-Yi Huang, Jen-Chieh Liu, Kuo-Hsing Cheng
All-Digital PLL Using Pulse-Based DCO. ICECS (2007)
Hong-Yi Huang, Sheng-Da Wu, Yi-Jui Tsai
A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme. ISCAS (2007)
Hong-Yi Huang, Ching-Chieh Wu, Sen-Da Wu
On-chip bidirectional transceiver. ISCAS (2006)
Hong-Yi Huang, Chia-Ming Liang, Wei-Ming Chiu
1-99% input duty 50% output duty cycle corrector. ISCAS (2006)
Hong-Yi Huang, Bo-Ruei Wang, Jen-Chieh Liu
High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit. ISCAS (2006)
Hong-Yi Huang, Sheng-Fen Ho, Li-Wei Huang
A 64-MHz~1920-MHz programmable spread-spectrum clock generator. ISCAS (4) (2005)
Chun-Jen Huang, Hong-Yi Huang
A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs. ISCAS (1) (2004)
Wei-Ming Lin, Hong-Yi Huang
A low-jitter mutual-correlated pulsewidth control loop circuit. IEEE J. Solid State Circuits 39 (8) (2004)
Hong-Yi Huang, Jing-Fu Lin
Design and application of CMOS bulk input scheme. IEEE J. Solid State Circuits 39 (8) (2004)
Hong-Yi Huang, Shih-Lun Chen
Interconnect accelerating techniques for sub-100-nm gigascale systems. IEEE Trans. Very Large Scale Integr. Syst. 12 (11) (2004)
Chin-Shan Hsieh, Hong-Yi Huang, Jeng-Dang Juan, Ruey-Nan Yeh
A high-bandwidth wireless infrared receiver with feedforward offset extractor. ISCAS (1) (2003)
Hong-Yi Huang, Hsuan-Yi Su
Low-power 2P2N SRAM with column hidden refresh. ISCAS (4) (2002)
Hong-Yi Huang, Shih-Lun Chen
Threshold triggers and accelerator for deep submicron interconnection. APCCAS (2) (2002)
Hong-Yi Huang, Jing-Fu Lin
Multiple bulk input differential logic. APCCAS (1) (2002)
Hong-Yi Huang, Shih-Lun Chen
Input isolated sense amplifiers. ISCAS (4) (2002)
Hong-Yi Huang, Jing-Fu Lin
CMOS bulk input technique. ISCAS (3) (2002)
Hong-Yi Huang, Shih-Lun Chen
High-speed receivers for on-chip interconnections in deep-submicron process. ICECS (2002)
Fu-Kai Tsai, Hong-Yi Huang, Li-Kuo Dai, Cheng-Der Chiang, Ping-Kuo Weng, Yung-Chung Chin
A time-delay-integration CMOS readout circuit for IR scanning. ICECS (2002)
Hong-Yi Huang, Teng-Neng Wang
High-speed CMOS logic circuits in capacitor coupling technique. ISCAS (4) (2001)
Hong-Yi Huang, Jinn-Shyan Wang, Yuan-Hua Chu, Tain-Shun Wu, Kuo-Hsing Cheng, Chung-Yu Wu
Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits. ISCAS (1995)
Hong-Yi Huang, Chung-Yu Wu
New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems. ISCAS (1994)
Hong-Yi Huang, Chung-Yu Wu
Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications. ISCAS (1993)