Low-power 50% duty cycle corrector.

Hong-Yi Huang Chia-Ming Liang Shi-Jia Sun

Published in: ISCAS (2008)

Keyphrases

low power
duty cycle
low cost
power consumption
high speed
real time
single chip
vlsi architecture
low power consumption
vlsi circuits
digital signal processing
clock frequency
mixed signal
logic circuits
power reduction
gate array
image sensor
power dissipation
fine grained