Dongsuk Jeon

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 42

Top Topics

Feature Extraction

Training Process

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Sunghyeon Woo, Sunwoo Lee, Dongsuk Jeon
ALAM: Averaged Low-Precision Activation for Memory-Efficient Training of Transformer Models. ICLR (2024)
Sangsu Jeong, Juyoung Oh, Dongsuk Jeon
Compute-In-Memory SRAM Macro with Analog-Digital Hybrid Computing for Deep Neural Network Inference. CICC (2024)
Minyoung Kang, Sunghoon Kim, Youngmin Park, Sangsu Jeong, Dongsuk Jeon
A 28nm All-Digital Droop Detection and Mitigation Circuit Using a Shared Dual-Mode Delay Line with 14.8% VminReduction and 42.9% Throughput Gain. CICC (2024)
Sunghyeon Woo, Baeseong Park, Byeongwook Kim, Minjung Jo, Sejung Kwon, Dongsuk Jeon, Dongsoo Lee
DropBP: Accelerating Fine-Tuning of Large Language Models by Dropping Backward Propagation. CoRR (2024)
Hsueh-Cheng Wang, Siao-Cing Huang, Po-Jui Huang, Kuo-Lun Wang, Yi-Chen Teng, Yu-Ting Ko, Dongsuk Jeon, I-Chen Wu
Curriculum Reinforcement Learning From Avoiding Collisions to Navigating Among Movable Obstacles in Diverse Environments. IEEE Robotics Autom. Lett. 8 (5) (2023)
Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon
A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array. ESSCIRC (2023)
Sungjin Park, Sunwoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Dongsuk Jeon
740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS. ISSCC (2023)
Yejun Ko, Sunghoon Kim, Kwanghyun Shin, Youngmin Park, Sundo Kim, Dongsuk Jeon
A 65 nm 12.92-nJ/Inference Mixed-Signal Neuromorphic Processor for Image Classification. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)
Sunghyeon Woo, Dongsuk Jeon
Learning with Auxiliary Activation for Memory-Efficient Training. ICLR (2023)
Wonjae Lee, Kukbyung Kim, Woohyun Ahn, Jinho Kim, Dongsuk Jeon
A Real-Time Object Detection Processor With xnor-Based Variable-Precision Computing Unit. IEEE Trans. Very Large Scale Integr. Syst. 31 (6) (2023)
Jiwoo Hong, Sunghoon Kim, Dongsuk Jeon
An Automatic Circuit Design Framework for Level Shifter Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
A low power neural network training processor with 8-bit floating point with a shared exponent bias and fused multiply add trees. AICAS (2022)
Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon
Toward Efficient Low-Precision Training: Data Format Optimization and Hysteresis Quantization. ICLR (2022)
Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
A Neural Network Training Processor With 8-Bit Shared Exponent Bias Floating Point and Multiple-Way Fused Multiply-Add Trees. IEEE J. Solid State Circuits 57 (3) (2022)
Sangsu Jeong, Jeongwoo Park, Dongsuk Jeon
A 28nm 1.644TFLOPS/W Floating-Point Computation SRAM Macro with Variable Precision for Deep Neural Network Inference and Training. ESSCIRC (2022)
Sunghoon Kim, Wonjae Lee, Sundo Kim, Sungjin Park, Dongsuk Jeon
An In-Memory Computing SRAM Macro for Memory-Augmented Neural Network. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Youngmin Park, Dongsuk Jeon
A 270-mA Self-Calibrating-Clocked Output-Capacitor-Free LDO With 0.15-1.15V Output Range and 0.183-fs FoM. IEEE Trans. Very Large Scale Integr. Syst. 30 (9) (2022)
Hanbyeol Kwon, Kwangrae Kim, Dongsuk Jeon, Ki-Seok Chung
Reducing Refresh Overhead with In-DRAM Error Correction Codes. ISOCC (2021)
Hyeong-Seok Choi, Sungjin Park, Jie Hwan Lee, Hoon Heo, Dongsuk Jeon, Kyogu Lee
Real-Time Denoising and Dereverberation wtih Tiny Recurrent U-Net. ICASSP (2021)
Jeongwoo Park, Sunwoo Lee, Dongsuk Jeon
A 40nm 4.81TFLOPS/W 8b Floating-Point Training Processor for Non-Sparse Neural Networks Using Shared Exponent Bias and 24-Way Fused Multiply-Add Tree. ISSCC (2021)
Changyu Seong, Wonjae Lee, Dongsuk Jeon
A Multi-Channel Spike Sorting Processor With Accurate Clustering Algorithm Using Convolutional Autoencoder. IEEE Trans. Biomed. Circuits Syst. 15 (6) (2021)
Gwangho Lee, Sunwoo Lee, Dongsuk Jeon
Dynamic Block-Wise Local Learning Algorithm for Efficient Neural Network Training. IEEE Trans. Very Large Scale Integr. Syst. 29 (9) (2021)
Jiwoo Hong, Sunghoon Kim, Jaeha Kim, Dongsuk Jeon
Fast Automatic Circuit Optimization Using Deep Learning. ISOCC (2021)
Hyeong-Seok Choi, Sungjin Park, Jie Hwan Lee, Hoon Heo, Dongsuk Jeon, Kyogu Lee
Real-time Denoising and Dereverberation with Tiny Recurrent U-Net. CoRR (2021)
Sunghyeon Woo, Jeongwoo Park, Jiwoo Hong, Dongsuk Jeon
Activation Sharing with Asymmetric Paths Solves Weight Transport Problem without Bidirectional Connection. NeurIPS (2021)
Kwanghyun Shin, Dong-Woo Jee, Dongsuk Jeon
A 65nm 0.6-1.2V Low-Dropout Regulator Using Voltage-Difference-to-Time Converter With Direct Output Feedback. IEEE Trans. Circuits Syst. II Express Briefs 68 (1) (2021)
Yeonsoo Jeon, Dongsuk Jeon
A Fast Finite Field Multiplier for SIKE. CoRR (2020)
Jeongwoo Park, Juyun Lee, Dongsuk Jeon
A 65-nm Neuromorphic Image Classification Processor With Energy-Efficient Training Through Direct Spike-Only Feedback. IEEE J. Solid State Circuits 55 (1) (2020)
Sungjin Park, Dongsuk Jeon
A Modified Serial Commutator Architecture for Real-Valued Fast Fourier Transform. SiPS (2020)
Jeongwoo Park, Juyun Lee, Dongsuk Jeon
A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only Feedback. ISSCC (2019)
Juyun Lee, Dong-Woo Jee, Dongsuk Jeon
Power-up control techniques for reliable SRAM PUF. IEICE Electron. Express 16 (13) (2019)
Jiho Kim, Jehee Cha, Jason Jong Kyu Park, Dongsuk Jeon, Yongjun Park
Improving GPU Multitasking Efficiency Using Dynamic Resource Sharing. IEEE Comput. Archit. Lett. 18 (1) (2019)
Suhong Moon, Kwanghyun Shin, Dongsuk Jeon
Enhancing Reliability of Analog Neural Network Processors. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Anh-Tuan Do, Seyed Mohammad Ali Zeinolabedin, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175µW/Channel in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 27 (1) (2019)
Junmo Park, Yongin Kwon, Yongjun Park, Dongsuk Jeon
Microarchitecture-Aware Code Generation for Deep Learning on Single-ISA Heterogeneous Multi-Core Mobile Processors. IEEE Access 7 (2019)
Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector. IEEE J. Solid State Circuits 53 (1) (2018)
Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS. IEEE J. Solid State Circuits 52 (6) (2017)
Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment. ISSCC (2017)
Dongsuk Jeon, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, Anantha P. Chandrakasan
24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired. ISSCC (2016)
Dongsuk Jeon
Design techniques for ultra-efficient computing. ISOCC (2016)
Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
per channel in 65-nm CMOS. VLSI Circuits (2016)
Seyed Mohammad Ali Zeinolabedin, Anh-Tuan Do, Dongsuk Jeon, Dennis Sylvester, Tony Tae-Hyoung Kim
per Channel in 65-nm CMOS. APCCAS (2016)
Seokhyeon Jeong, Wanyeong Jung, Dongsuk Jeon, Omer Berenfeld, Hakan Oral, Grant H. Kruger, David T. Blaauw, Dennis Sylvester
A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications. VLSIC (2015)
Yen-Po Chen, Dongsuk Jeon, Yoonmyung Lee, Yejoong Kim, Zhiyoong Foo, Inhee Lee, Nicholas B. Langhals, Grant H. Kruger, Hakan Oral, Omer Berenfeld, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring. IEEE J. Solid State Circuits 50 (1) (2015)
Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC (2015)
Dongsuk Jeon, Yen-Po Chen, Yoonmyung Lee, Yejoong Kim, Zhiyoong Foo, Grant H. Kruger, Hakan Oral, Omer Berenfeld, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
24.3 An implantable 64nW ECG-monitoring mixed-signal SoC for arrhythmia diagnosis. ISSCC (2014)
Dongsuk Jeon, Michael B. Henry, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS. IEEE J. Solid State Circuits 49 (5) (2014)
Inhee Lee, Yejoong Kim, Suyoung Bang, Gyouho Kim, Hyunsoo Ha, Yen-Po Chen, Dongsuk Jeon, Seokhyun Jeong, Wanyeong Jung, Mohammad Hassan Ghaed, Zhiyoong Foo, Yoonmyung Lee, Jae-Yoon Sim, Dennis Sylvester, David T. Blaauw
Circuit techniques for miniaturized biomedical sensors. CICC (2014)
Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
A 470mV 2.7mW feature extraction-accelerator for micro-autonomous vehicle navigation in 28nm CMOS. ISSCC (2013)
Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
A low-power VGA full-frame feature extraction processor. ICASSP (2013)
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS. IEEE J. Solid State Circuits 47 (1) (2012)
Dongsuk Jeon, Mingoo Seok, Zhengya Zhang, David T. Blaauw, Dennis Sylvester
Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems. IEEE Trans. Circuits Syst. II Express Briefs (12) (2012)
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs. ICICDT (2012)
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design. DAC (2011)
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
Energy-optimized high performance FFT processor. ICASSP (2011)
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining. ISSCC (2011)