A 28nm All-Digital Droop Detection and Mitigation Circuit Using a Shared Dual-Mode Delay Line with 14.8% VminReduction and 42.9% Throughput Gain.
Minyoung KangSunghoon KimYoungmin ParkSangsu JeongDongsuk JeonPublished in: CICC (2024)
Keyphrases
- circuit design
- automatic detection
- detection rate
- detection algorithm
- detection method
- false alarms
- false positives
- high speed
- object detection
- detection accuracy
- cmos technology
- response time
- anomaly detection
- low cost
- image sequences
- metal oxide semiconductor
- mixed signal
- computer vision
- power consumption
- hough transform
- image processing