​
Login / Signup
Boryau Sheu
Publication Activity (10 Years)
Years Active: 2005-2010
Publications (10 Years): 0
</>
Publications
</>
Laung-Terng Wang
,
Xiaoqing Wen
,
Shianling Wu
,
Hiroshi Furukawa
,
Hao-Jan Chao
,
Boryau Sheu
,
Jianghao Guo
,
Wen-Ben Jone
Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
29 (2) (2010)
Lizhen Yu
,
Jeffrey Hung
,
Boryau Sheu
,
Bill Huynh
,
Loc Nguyen
,
Shianling Wu
,
Laung-Terng Wang
,
Xiaoqing Wen
Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs.
DFT
(2010)
Laung-Terng Wang
,
Ravi Apte
,
Shianling Wu
,
Boryau Sheu
,
Wen-Ben Jone
,
Jianghao Guo
,
Kuen-Jong Lee
,
Wei-Shin Wang
,
Xiaoqing Wen
,
Hao-Jan Chao
,
Jinsong Liu
,
Yanlong Niu
,
Yi-Chih Sung
,
Chi-Chun Wang
,
Fangfang Li
Turbo1500: Core-Based Design for Test and Diagnosis.
IEEE Des. Test Comput.
26 (1) (2009)
Laung-Terng Wang
,
Ravi Apte
,
Shianling Wu
,
Boryau Sheu
,
Kuen-Jong Lee
,
Xiaoqing Wen
,
Wen-Ben Jone
,
Chia-Hsien Yeh
,
Wei-Shin Wang
,
Hao-Jan Chao
,
Jianghao Guo
,
Jinsong Liu
,
Yanlong Niu
,
Yi-Chih Sung
,
Chi-Chun Wang
,
Fangfang Li
Turbo1500: Toward Core-Based Design for Test and Diagnosis Using the IEEE 1500 Standard.
ITC
(2008)
Laung-Terng Wang
,
Xiaoqing Wen
,
Shianling Wu
,
Zhigang Wang
,
Zhigang Jiang
,
Boryau Sheu
,
Xinli Gu
VirtualScan: Test Compression Technology Using Combinational Logic and One-Pass ATPG.
IEEE Des. Test Comput.
25 (2) (2008)
Shianling Wu
,
Laung-Terng Wang
,
Zhigang Jiang
,
Jiayong Song
,
Boryau Sheu
,
Xiaoqing Wen
,
Michael S. Hsiao
,
James Chien-Mo Li
,
Jiun-Lang Huang
,
Ravi Apte
On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs.
DFT
(2008)
Shianling Wu
,
Hiroshi Furukawa
,
Boryau Sheu
,
Laung-Terng Wang
,
Hao-Jan Chao
,
Lizhen Yu
,
Xiaoqing Wen
,
Michio Murakami
Practical Challenges in Logic BIST Implementation.
ATS
(2008)
Hiroshi Furukawa
,
Xiaoqing Wen
,
Laung-Terng Wang
,
Boryau Sheu
,
Zhigang Jiang
,
Shianling Wu
A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing.
ITC
(2006)
Laung-Terng Wang
,
Khader S. Abdel-Hafez
,
Xiaoqing Wen
,
Boryau Sheu
,
Shianling Wu
,
Shyh-Horng Lin
,
Ming-Tung Chang
UltraScan: using time-division demultiplexing/multiplexing (TDDM/TDM) with VirtualScan for test cost reduction.
ITC
(2005)
Shianling Wu
,
Laung-Terng Wang
,
Jin Woo Cho
,
Zhigang Jiang
,
Boryau Sheu
Test compression and logic BIST at your fingertips.
ITC
(2005)