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Lizhen Yu
Publication Activity (10 Years)
Years Active: 2008-2012
Publications (10 Years): 0
Top Topics
Database Administrators
Chip Design
Built In Self Test
Query Optimization
Top Venues
ISQED
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Publications
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Kelvin Nelson
,
Jaga Shanmugavadivelu
,
Jayanth Mekkoth
,
Venkat Ghanta
,
Jun Wu
,
Fei Zhuang
,
Hao-Jan Chao
,
Shianling Wu
,
Jie Rao
,
Lizhen Yu
,
Laung-Terng Wang
Physical-design-friendly hierarchical logic built-in self-test - A case study.
ISQED
(2012)
Shianling Wu
,
Laung-Terng Wang
,
Xiaoqing Wen
,
Zhigang Jiang
,
Lang Tan
,
Yu Zhang
,
Yu Hu
,
Wen-Ben Jone
,
Michael S. Hsiao
,
James Chien-Mo Li
,
Jiun-Lang Huang
,
Lizhen Yu
Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
30 (3) (2011)
Lizhen Yu
,
Jeffrey Hung
,
Boryau Sheu
,
Bill Huynh
,
Loc Nguyen
,
Shianling Wu
,
Laung-Terng Wang
,
Xiaoqing Wen
Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs.
DFT
(2010)
Shianling Wu
,
Laung-Terng Wang
,
Lizhen Yu
,
Hiroshi Furukawa
,
Xiaoqing Wen
,
Wen-Ben Jone
,
Nur A. Touba
,
FeiFei Zhao
,
Jinsong Liu
,
Hao-Jan Chao
,
Fangfang Li
,
Zhigang Jiang
Logic BIST Architecture Using Staggered Launch-on-Shift for Testing Designs Containing Asynchronous Clock Domains.
DFT
(2010)
Jun Qian
,
Xingang Wang
,
Qinfu Yang
,
Fei Zhuang
,
Junbo Jia
,
Xiangfeng Li
,
Yuan Zuo
,
Jayanth Mekkoth
,
Jinsong Liu
,
Hao-Jan Chao
,
Shianling Wu
,
Huafeng Yang
,
Lizhen Yu
,
FeiFei Zhao
,
Laung-Terng Wang
Logic BIST Architecture for System-Level Test and Diagnosis.
Asian Test Symposium
(2009)
Xiaoli Ye
,
Lizhen Yu
,
Zhiqin Shen
A Measurement Device for the Dynamic Unbalance of Crankshaft.
PACCS
(2009)
Shianling Wu
,
Hiroshi Furukawa
,
Boryau Sheu
,
Laung-Terng Wang
,
Hao-Jan Chao
,
Lizhen Yu
,
Xiaoqing Wen
,
Michio Murakami
Practical Challenges in Logic BIST Implementation.
ATS
(2008)