Logic BIST Architecture Using Staggered Launch-on-Shift for Testing Designs Containing Asynchronous Clock Domains.
Shianling WuLaung-Terng WangLizhen YuHiroshi FurukawaXiaoqing WenWen-Ben JoneNur A. ToubaFeiFei ZhaoJinsong LiuHao-Jan ChaoFangfang LiZhigang JiangPublished in: DFT (2010)
Keyphrases
- built in self test
- delay insensitive
- management system
- asynchronous circuits
- real time
- modal logic
- logic programming
- software architecture
- design principles
- network architecture
- real world
- reasoning engine
- test cases
- life cycle
- high speed
- flip flops
- logical framework
- classical logic
- duty cycle
- embedded systems
- software testing
- online discussion
- data flow
- application domains
- neural network