A. Richard Newton

Publication Activity (10 Years)

Years Active: 1980-2006
Publications (10 Years): 0

Publications

Zile Wei, Donald Chai, A. Richard Newton, Andreas Kuehlmann
Fast Boolean Matching with Don't Cares. ISQED (2006)
Heloise Hwawen Hse, A. Richard Newton
Recognition and beautification of multi-stroke symbols in digital ink. Comput. Graph. 29 (4) (2005)
Heloise Hwawen Hse, A. Richard Newton
Recognition and Beautification of Multi-Stroke Symbols in Digital Ink. AAAI Technical Report (6) (2004)
Zile Wei, Yu Cao, A. Richard Newton
Digital Image Restoration by Exposure-Splitting and Registration. ICPR (4) (2004)
A. Richard Newton
Great works for the 21st century: a critical role for the modern research university. EMSOFT (2004)
Heloise Hwawen Hse, Michael Shilman, A. Richard Newton
Robust sketched symbol fragmentation using templates. IUI (2004)
Heloise Hwawen Hse, A. Richard Newton
Sketched Symbol Recognition using Zernike Moments. ICPR (1) (2004)
Kurt Keutzer, Sharad Malik, A. Richard Newton
From ASIC to ASIP: The Next Design Discontinuity. ICCD (2002)
Randal E. Bryant, Kwang-Ting Cheng, Andrew B. Kahng, Kurt Keutzer, Wojciech Maly, A. Richard Newton, Lawrence T. Pileggi, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
Limitations and challenges of computer-aided design technology for CMOS VLSI. Proc. IEEE 89 (3) (2001)
Lixin Su, Wray L. Buntine, A. Richard Newton, Bradley S. Peters
Learning as applied to stochastic optimization for standard-cellplacement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (4) (2001)
Abdallah Tabbara, Bassam Tabbara, Robert K. Brayton, A. Richard Newton
Integration of retiming with architectural floorplanning. Integr. 29 (1) (2000)
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
Predicting performance potential of modern DSPs. DAC (2000)
A. Richard Newton, Walden C. Rhines, Sünke Mehrgardt, Henry Samueli, Tudor Brown
Embedded systems design in the new millennium (panel session). DAC (2000)
Kurt Keutzer, A. Richard Newton, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
System-level design: orthogonalization of concerns andplatform-based design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (12) (2000)
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
Retargetable estimation scheme for DSP architecture selection. ASP-DAC (2000)
Abdallah Tabbara, Robert K. Brayton, A. Richard Newton
Retiming for DSM with Area-Delay Trade-Offs and Delay Constraints. DAC (1999)
Kurt Keutzer, A. Richard Newton
The MARCO/DARPA Gigascale Silicon Research Center. ICCD (1999)
James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul N. Hilfinger, A. Richard Newton
Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement. DAC (1998)
Francis L. Chan, Mark D. Spiller, A. Richard Newton
WELD - An Environment for Web-based Electronic Design. DAC (1998)
A. Richard Newton
Technical Challenges of IP and System-on-Chip: The ASIC Vendor Perspective (Panel). DAC (1998)
Lixin Su, Wray L. Buntine, A. Richard Newton, Bradley S. Peters
Learning as applied to stochastic optimization for standard cell placement. ICCD (1998)
Juan Bicarregui, D. L. Clutterbuck, Gavin R. Finnie, Howard P. Haughton, Kevin Lano, H. Lesan, D. W. R. M. Marsh, B. M. Matthews, Michael R. Moulding, A. Richard Newton, Brian Ritchie, T. G. A. Rushton, P. N. Scharbach
Formal methods into practice: case studies in the application of the B method. IEE Proc. Softw. Eng. 144 (2) (1997)
Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Logic synthesis for large pass transistor circuits. ICCAD (1997)
Wray L. Buntine, Lixin Su, A. Richard Newton, Andrew Mayer
Adaptive methods for netlist partitioning. ICCAD (1997)
Mark D. Spiller, A. Richard Newton
EDA and the network. ICCAD (1997)
Kurt Keutzer, A. Richard Newton, Narendra V. Shenoy
The future of logic synthesis and physical design in deep-submicron process geometries. ISPD (1997)
Premal Buch, Christopher K. Lennard, A. Richard Newton
Engineering change for power optimization using global sensitivity and synthesis flexibility. ISLPED (1997)
Wendell C. Baker, A. Richard Newton
The maximal VHDL subset with a cycle-level abstraction. EURO-DAC (1996)
Christopher K. Lennard, A. Richard Newton
On estimation accuracy for guiding low-power resynthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (6) (1996)
Christopher K. Lennard, Premal Buch, A. Richard Newton
Logic synthesis using power-sensitive don't care sets. ISLPED (1996)
Christopher K. Lennard, A. Richard Newton
An estimation technique to guide low power resynthesis algorithms. ISLPD (1995)
Ernst Siepmann, A. Richard Newton
TOBAC: A Test Case Browser for Testing Object-Oriented Software. ISSTA (1994)
Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson
Algorithms for the transient simulation of lossy interconnect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (1) (1994)
Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Two-Level Minimization of Multivalued Functions with Large Offsets. IEEE Trans. Computers 42 (11) (1993)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Sequential test generation and synthesis for testability at the register-transfer and logic levels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (5) (1993)
Takayasu Sakurai, Bill Lin, A. Richard Newton
Fast simulated diffusion: an optimization algorithm for multiminimum problems and its application to MOSFET model parameter extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (2) (1992)
Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson
An exact analytic technique for simulating uniform RC lines. EURO-DAC (1992)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Heuristic minimization of Boolean relations using testing techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (9) (1992)
Michael Pabst, Tiziano Villa, A. Richard Newton
Experiments on the synthesis and testability of non-scan finite state machines. EURO-DAC (1992)
Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson
Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time. DAC (1992)
Xuejun Du, Gary D. Hachtel, Bill Lin, A. Richard Newton
MUSE: a multilevel symbolic encoding algorithm for state assignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (1) (1991)
Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson
An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation. ICCAD (1991)
Srinivas Devadas, A. Richard Newton
Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (1) (1991)
A. Richard Newton
Has CAD for VLSI Reached a Dead End? VLSI (1991)
A. Richard Newton
Framework Standards: How Important are They? (Panel Abstract). DAC (1991)
Bill Lin, A. Richard Newton
Exact Redundant State Registers Removal Based on Binary Decision Diagrams. VLSI (1991)
Pranav Ashar, Srinivas Devadas, A. Richard Newton
Irredundant interacting sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (3) (1991)
Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Reduced offsets for minimization of binary-valued functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (4) (1991)
Pranav Ashar, Srinivas Devadas, A. Richard Newton
Optimum and heuristic algorithms for an approach to finite state machine decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (3) (1991)
Seung Ho Hwang, A. Richard Newton
An efficient verifier for finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (3) (1991)
Chuck Kring, A. Richard Newton
A Cell-Replicating Approach to Minicut-Based Circuit Partitioning. ICCAD (1991)
Bill Lin, A. Richard Newton
Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams. ICCD (1991)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Test generation and verification for highly sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (5) (1991)
Bill Lin, A. Richard Newton
A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (9) (1990)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Heuristic minimization of Boolean relations using testing techniques. ICCD (1990)
Pranav Ashar, Srinivas Devadas, A. Richard Newton
A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. DAC (1990)
Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test. ICCAD (1990)
A. Richard Newton
Standards, Openness and Design Environments in Electronic Design Automation (Panel Abstract). DAC (1990)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
Redundancies and don't cares in sequential logic synthesis. J. Electron. Test. 1 (1) (1990)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Verification of Interacting Sequential Circuits. DAC (1990)
Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Reduced Offsets for Two-Level Multi-Valued Logic Minimization. DAC (1990)
Brian W. O'Krafka, A. Richard Newton
An Empirical Evaluation of Two Memory-Efficient Directory Methods. ISCA (1990)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Irredundant sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (1) (1990)
Bill Lin, Hervé J. Touati, A. Richard Newton
Don't Care Minimization of Multi-Level Sequential Logic Networks. ICCAD (1990)
Pranav Ashar, Srinivas Devadas, A. Richard Newton
Testability driven synthesis of interacting finite state machines. ICCD (1990)
Gregory S. Whitcomb, A. Richard Newton
Abstract Data Types and High-Level Synthesis. DAC (1990)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Sequential logic synthesis for testability using register-transfer level descriptions. ITC (1990)
Andrea Casotto, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Design Management Based on Design Traces. DAC (1990)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Sequential Test Generation at the Register-Transfer and Logic Levels. DAC (1990)
Pranav Ashar, Srinivas Devadas, A. Richard Newton
Optimum and heuristic algorithms for finite state machine decomposition and partitioning. ICCAD (1989)
Resve A. Saleh, A. Richard Newton
The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (12) (1989)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
A synthesis and optimization procedure for fully and easily testable sequential machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (10) (1989)
Bill Lin, A. Richard Newton
A generalized approach to the constrained cubical embedding problem. ICCD (1989)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
Easily testable PLA-based finite state machines. FTCS (1989)
Young Hwan Kim, Seung Ho Hwang, A. Richard Newton
Electrical-logic simulation and its applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (1) (1989)
Mark Beardslee, Chuck Kring, Rajeev Murgai, Hamid Savoj, Robert K. Brayton, A. Richard Newton
SLIP: a software environment for system level interactive partitioning. ICCAD (1989)
Srinivas Devadas, A. Richard Newton
Algorithms for hardware allocation in data path synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (7) (1989)
Srinivas Devadas, A. Richard Newton
Decomposition and factorization of sequential finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (11) (1989)
Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
Test generation for highly sequential circuits. ICCAD (1989)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
Redundancies and Don't Cares in Sequential Logic Synthesis. ITC (1989)
Rick L. Spickelmier, A. Richard Newton
Critic: a knowledge-based program for critiquing circuit designs. ICCD (1988)
Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli
An Incomplete Scan Design Approach to Test Generation for Sequential Machines. ITC (1988)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (12) (1988)
Srinivas Devadas, A. Richard Newton
Decomposition and factorization of sequential finite state machines. ICCAD (1988)
Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Test generation for sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (10) (1988)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. ITC (1988)
Srinivas Devadas, Albert R. Wang, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Boolean decomposition in multi-level logic optimization. ICCAD (1988)
A. Richard Newton
Twenty-Five Years of Electronic Design Automation. DAC (1988)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
On the verification of sequential machines at differing levels of abstraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (6) (1988)
Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
A modified approach to two-level logic minimization. ICCAD (1988)
Srinivas Devadas, A. Richard Newton
Topological Optimization of Multiple-Level Array Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (6) (1987)
Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton
On the Verification of Sequential Machines at Differing Levels of Abstraction. DAC (1987)
Bill Lin, A. Richard Newton
KAHLUA: A Hierarchical Circuit Disassembler. DAC (1987)
A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Computer-Aided Design for VLSI Circuits. Computer 19 (4) (1986)
Seung Ho Hwang, Young Hwan Kim, A. Richard Newton
An accuration delay modeling technique for switch-level timing verification. DAC (1986)
Srinivas Devadas, A. Richard Newton
GENIE: a generalized array optimizer for VLSI synthesis. DAC (1986)
Carlo H. Séquin, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Highlights of VLSI Research at Berkeley. FJCC (1986)
George K. Jacob, A. Richard Newton, Donald O. Pederson
An empirical analysis of the performance of a multiprocessor-based circuit simulator. DAC (1986)
A. Richard Newton, Donald O. Pederson, Alberto L. Sangiovanni-Vincentelli
Design Aids for VLSI: A Perspective Revisited. IEEE Des. Test 2 (2) (1985)
A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
Relaxation-Based Electrical Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3 (4) (1984)

A. Richard Newton.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

A. Richard Newton