Vladimir Petrovic

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 7

Top Topics

Error Detection And Correction

Integrated Circuit

Top Venues

Microelectron. Reliab.

J. Circuits Syst. Comput.

Publications

Dejan Mirkovic, Milena Stanojlovic Mirkovic, Miljana Milic, Vladimir Petrovic
A Defects Classification Algorithm for the Hybrid OBT-IDDQ Fault Diagnosis Technique in Analog CMOS Integrated Circuits. J. Circuits Syst. Comput. 33 (9) (2024)
Marko S. Andjelkovic, Vladimir Petrovic, Miljana Nenadovic, Anselm Breitenreiter, Milos Krstic, Rolf Kraemer
Design of an On-chip System for the SET Pulse Width Measurement. DSD (2017)
Oliver Schrape, Arkadiusz Koczor, Piotr Penkala, Vladimir Petrovic, Milos Krstic
Implementation of DBFN processor for Synthetic Aperture Radar application. DDECS (2016)
Aleksandar Simevski, Klaus Schleisiek, Vladimir Petrovic, Norbert Beller, Patryk Skoncej, Günter Schoof, Milos Krstic
Implementation of a real time unit for satellite applications. DDECS (2016)
Zoran Stamenkovic, Vladimir Petrovic
A comprehensive approach to fault tolerance: Device, circuit, and system techniques. LATS (2016)
Marko S. Andjelkovic, Aleksandar Ilic, Vladimir Petrovic, Miljana Nenadovic, Zoran Stamenkovic, Goran S. Ristic
SET response of a SEL protection switch for 130 and 250 nm CMOS technologies. IOLTS (2016)
Milos Krstic, Stefan Weidling, Vladimir Petrovic, Egor S. Sogomonyan
Enhanced architectures for soft error detection and correction in combinational and sequential circuits. Microelectron. Reliab. 56 (2016)
Marko S. Andjelkovic, Vladimir Petrovic, Zoran Stamenkovic, Goran S. Ristic, Goran S. Jovanovic
Circuit-Level Simulation of the Single Event Transients in an On-Chip Single Event Latchup Protection Switch. J. Electron. Test. 31 (3) (2015)
Vladimir Petrovic, Milos Krstic
Design Flow for Radhard TMR Flip-Flops. DDECS (2015)
Marko S. Andjelkovic, Vladimir Petrovic, Zoran Stamenkovic, Goran S. Ristic, Goran S. Jovanovic
Simulation-Based Analysis of the Single Event Transient Response of a Single Event Latchup Protection Switch. DDECS (2015)
Vladimir Petrovic, Vladimir Dimitrijevic
Focused pooling for image fusion evaluation. Inf. Fusion 22 (2015)
Vladimir Petrovic, Günter Schoof, Zoran Stamenkovic
Fault-tolerant TMR and DMR circuits with latchup protection switches. Microelectron. Reliab. 54 (8) (2014)
Nemanja Savic, Mile K. Stojcev, Tatjana R. Nikolic, Vladimir Petrovic, Goran S. Jovanovic
Reconfigurable Low Power Architecture for Fault Tolerant Pseudo-Random number Generation. J. Circuits Syst. Comput. 23 (1) (2014)
Milos Krstic, Stefan Weidling, Vladimir Petrovic, Michael Gössel
Improved circuitry for soft error correction in combinational logic in pipelined designs. IOLTS (2014)
Sebastian Taube, Vladimir Petrovic, Milos Krstic
Fault tolerant implementation of a SpaceWire interface. ICECS (2014)
Vladimir Petrovic, Günter Schoof, Zoran Stamenkovic
Redundant circuits with latchup protection. ICECS (2013)
Veljko Potkonjak, Vladimir Petrovic, Kosta Jovanovic, Dragan Kostic
Human-Robot Analogy - How Physiology Shapes Human and Robot Motion. ECAL (2013)
Vladimir Petrovic, Zoran Stamenkovic, Mile K. Stojcev, Tatjana R. Nikolic, Goran S. Jovanovic
Fault-Tolerant Reconfigurable Low-Power pseudoRandom number Generator. DDECS (2013)
Vladimir Petrovic, Vladimir Dimitrijevic
Focused pooling for objective quality estimation. ICIP (2013)
Vladimir Petrovic, Marko Ilic, Günter Schoof, Zoran Stamenkovic
Design methodology for fault tolerant ASICs. DDECS (2012)
Mohammad Reza Kakoee, Vladimir Petrovic, Luca Benini
A multi-banked shared-l1 cache architecture for tightly coupled processor clusters. ISSoC (2012)
Vladimir Petrovic, Günter Schoof, Sergio Montenegro
Middleware switch ASIC implementation. ICECS (2011)
Theodore Zervos, Antonis Alexandridis, Vladimir Petrovic, Kostas Dangakis, Branko M. Kolundzija, Antonije R. Djordjevic, Constantine F. Soras
Mobile Phone Antenna Performance and Power Absorption in Terms of Handset Size and Distance from User's Head. Wirel. Pers. Commun. 33 (2) (2005)