Shekhar Y. Borkar

Publication Activity (10 Years)

Years Active: 2002-2010
Publications (10 Years): 0

Publications

Shekhar Y. Borkar
Want to be a bug buster? Commun. ACM 53 (2) (2010)
Shekhar Y. Borkar
Future of interconnect fabric: a contrarian view. SLIP (2010)
Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar
Circuit techniques for dynamic variation tolerance. DAC (2009)
Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Y. Borkar, Vivek De, Ali Keshavarzi
2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process. ISSCC (2008)
Steven K. Hsu, Sanu K. Mathew, Mark A. Anders, Bart R. Zeydel, Vojin G. Oklobdzija, Ram K. Krishnamurthy, Shekhar Y. Borkar
A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS. IEEE J. Solid State Circuits 41 (1) (2006)
Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah
Is statistical timing statistically significant? DAC (2004)
Atila Alvandpour, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Y. Borkar
A sub-130-nm conditional keeper technique. IEEE J. Solid State Circuits 37 (5) (2002)
Ram K. Krishnamurthy, Atila Alvandpour, Ganesh Balamurugan, Naresh R. Shanbhag, Krishnamurthy Soumyanath, Shekhar Y. Borkar
A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file. IEEE J. Solid State Circuits 37 (5) (2002)
Masakazu Yamashina, Shekhar Y. Borkar
Guest editorial. IEEE J. Solid State Circuits 37 (5) (2002)