Ryusuke Egawa

ORCID

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 59

Top Venues

CANDAR

COOL Chips

3DIC

Supercomput. Front. Innov.

Publications

Jiaheng Liu, Ryusuke Egawa, Keichi Takahashi, Yoichi Shimomura, Hiroyuki Takizawa
Reuse distance-based shared LLC management mechanism for heterogeneous CPU-GPU systems. IEICE Electron. Express 21 (4) (2024)
Riku Nunokawa, Yoichi Shimomura, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
Conflict-aware workload co-execution on SX-aurora TSUBASA. CCF Trans. High Perform. Comput. 6 (4) (2024)
Ryusuke Egawa, Yasutaka Wada
Special Issue on COOL Chips. IEEE Micro 44 (1) (2024)
Ryusuke Egawa, Yasutaka Wada
Foreword. IEICE Trans. Electron. 107 (6) (2024)
Ryusuke Egawa, Yasutaka Wada
Special Issue on Cool Chips. IEEE Micro 43 (1) (2023)
Ryusuke Egawa, Yasutaka Wada
Foreword. IEICE Trans. Electron. 106 (6) (2023)
Keichi Takahashi, Soya Fujimoto, Satoru Nagase, Yoko Isobe, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer. ISC (2023)
Keichi Takahashi, Soya Fujimoto, Satoru Nagase, Yoko Isobe, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer. CoRR (2023)
Masayuki Sato, Yuya Omori, Ryusuke Egawa, Ken Nakamura, Daisuke Kobayashi, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi
A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders. PDCAT (2022)
Jiaheng Liu, Ryusuke Egawa, Hiroyuki Takizawa
A Conflict-Aware Capacity Control Mechanism for Deep Cache Hierarchy. IEICE Trans. Inf. Syst. (6) (2022)
Shunpei Sugawara, Keichi Takahashi, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
Equivalence Checking of Code Transformation by Numerical and Symbolic Approaches. PDCAT (2022)
Tatsuyoshi Ohmura, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
Toward Building a Digital Twin of Job Scheduling and Power Management on an HPC System. JSSPP (2022)
Mulya Agung, Yuta Watanabe, Henning Weber, Ryusuke Egawa, Hiroyuki Takizawa
Preemptive Parallel Job Scheduling for Heterogeneous Systems Supporting Urgent Computing. IEEE Access 9 (2021)
Riku Nunokawa, Yoichi Shimomura, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
Towards Conflict-Aware Workload Co-execution on SX-Aurora TSUBASA. PDCAT (2021)
Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata, Ryusuke Egawa
OpenCL-like offloading with metaprogramming for SX-Aurora TSUBASA. Parallel Comput. 102 (2021)
Shunpei Sugawara, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
Portability of Vectorization-aware Performance Tuning Expertise across System Generations. MCSoC (2021)
Suhang Jiang, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
Task Priority Control for the HPX Runtime System. IPDPS Workshops (2020)
Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
DeLoc: A Locality and Memory-Congestion-Aware Task Mapping Method for Modern NUMA Systems. IEEE Access 8 (2020)
Kazuhiko Komatsu, Ayumu Gomi, Ryusuke Egawa, Daisuke Takahashi, Reiji Suda, Hiroyuki Takizawa
Xevolver: A code transformation framework for separation of system-awareness from application codes. Concurr. Comput. Pract. Exp. 32 (7) (2020)
Michael R. Zielewski, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
Improving Quantum Annealing Performance on Embedded Problems. Supercomput. Front. Innov. 7 (4) (2020)
Naoki Ebata, Ryusuke Egawa, Yoko Isobe, Ryoji Takaki, Hiroyuki Takizawa
Automatically Avoiding Memory Access Conflicts on SX-Aurora TSUBASA. IPDPS Workshops (2020)
Ryusuke Egawa, Souya Fujimoto, Tsuyoshi Yamashita, Daisuke Sasaki, Yoko Isobe, Yoichi Shimomura, Hiroyuki Takizawa
Exploiting the Potentials of the Second Generation SX-Aurora TSUBASA. PMBS@SC (2020)
Takashi Soga, Kenta Yamaguchi, Raghunandan Mathur, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA. Supercomput. Front. Innov. 7 (4) (2020)
Naoki Ebata, Yoko Isobe, Ryusuke Egawa, Hiroyuki Takizawa
Polymorphic Data Layout for SX-Aurora TSUBASA Vector Engines. CANDAR (2020)
Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems. Supercomput. Front. Innov. 7 (1) (2020)
Jiaheng Liu, Ryusuke Egawa, Mulya Agung, Hiroyuki Takizawa
A Conflict-Aware Capacity Control Mechanism for Last-Level Cache. CANDAR (Workshops) (2020)
Reo Furuhata, Minglu Zhao, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
Improving the Accuracy in SpMV Implementation Selection with Machine Learning. CANDAR (Workshops) (2020)
Jubee Tada, Kazuto Takahashi, Ryusuke Egawa
A Design Scheme for 3-D Stacked CNN Accelerators. 3DIC (2019)
Kenta Yamaguchi, Takashi Soga, Yoichi Shimomura, Thorsten Reimann, Kazuhiko Komatsu, Ryusuke Egawa, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines. Supercomput. Front. Innov. 6 (1) (2019)
Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems. COOL CHIPS (2019)
Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems. MCSoC (2019)
Masayuki Sato, Takuya Toyoshima, Hikaru Takayashiki, Ryusuke Egawa, Hiroaki Kobayashi
An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems. Supercomput. Front. Innov. 6 (4) (2019)
Ryusuke Egawa, Ryoma Saito, Masayuki Sato, Hiroaki Kobayashi
A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism. HEART (2019)
Mulya Agung, Allen D. Malony, Hiroyuki Takizawa, David P. Bunde, Muhammad Alfian Amrizal, Steven Bogaerts, Ryusuke Egawa, Daniel A. Ellsworth, Jorge Fernández-Fabeiro, Arturo González-Escribano, Sukhamay Kundu, Alina Lazar
Peachy Parallel Assignments (EduHPC 2019). EduHPC@SC (2019)
Praphan Pavarangkoon, Takeshi Nanri, Ken T. Murata, Kazunori Yamamoto, Kazuya Muranaga, Takamichi Mizuhara, Keiichiro Fukazawa, Ryusuke Egawa, Takahiro Katagiri, Masao Ogino
Performance Improvement of High-Speed File Transfer Over JHPCN. DASC/PiCom/DataCom/CyberSciTech (2019)
Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata, Ryusuke Egawa
An OpenCL-Like Offload Programming Framework for SX-Aurora TSUBASA. PDCAT (2019)
Masayuki Sato, Zehua Li, Ryusuke Egawa, Hiroaki Kobayashi
An energy-aware set-level refreshing mechanism for eDRAM last-level caches. COOL CHIPS (2018)
Yuki Kawarabatake, Mulya Agung, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa
Use of Code Structural Features for Machine Learning to Predict Effective Optimizations. IPDPS Workshops (2018)
Zhen Wang, Mulya Agung, Ryusuke Egawa, Reiji Suda, Hiroyuki Takizawa
Automatic Hyperparameter Tuning of Machine Learning Models under Time Constraints. IEEE BigData (2018)
Xiong Xiao, Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications. CANDAR (2018)
Kazuya Kojima, Akimasa Hirata, Kazuma Hasegawa, Sachiko Kodera, Ilkka Laakso, Daisuke Sasaki, Takeshi Yamashita, Ryusuke Egawa, Yuka Horie, Nanako Yazaki, Saeri Kowata, Kenji Taguchi, Tatsuya Kashiwa
Risk Management of Heatstroke Based on Fast Computation of Temperature and Water Loss Using Weather Data for Exposure to Ambient Heat and Solar Radiation. IEEE Access 6 (2018)
Masayuki Sato, Yoshiki Shoji, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Muhammad Alfian Amrizal, Pei Li, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
A Failure Prediction-Based Adaptive Checkpointing Method with Less Reliance on Temperature Monitoring for HPC Applications. CLUSTER (2018)
Ryusuke Egawa, Kazuhiko Komatsu, Hiroyuki Takizawa
Designing an Open Database of System-Aware Code Optimizations. CANDAR (2017)
Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Directive Generation Approach to High Code-Maintainability for Various HPC Systems. Int. J. Netw. Comput. 7 (2) (2017)
Ryusuke Egawa, Kazuhiko Komatsu, Yoko Isobe, Toshihiro Kato, Souya Fujimoto, Hiroyuki Takizawa, Akihiro Musa, Hiroaki Kobayashi
Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs. CLUSTER (2017)
Mulya Agung, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa
A Memory Congestion-Aware MPI Process Placement for Modern NUMA Systems. HiPC (2017)
Ryusuke Egawa, Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE. J. Supercomput. 73 (9) (2017)
Jubee Tada, Masayuki Sato, Ryusuke Egawa
An Adaptive Demotion Policy for High-Associativity Caches. HEART (2017)
Masayuki Sato, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches. COOL Chips (2017)
Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa, Hiroaki Kobayashi
An application-adaptive data allocation method for multi-channel memory. COOL Chips (2017)
Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa, Hiroaki Kobayashi
Vectorization-Aware Loop Optimization with User-Defined Code Transformations. CLUSTER (2017)
Hiroyuki Takizawa, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa
An Application-Level Incremental Checkpointing Mechanism with Automatic Parameter Tuning. CANDAR (2017)
Jubee Tada, Maiki Hosokawa, Ryusuke Egawa, Hiroaki Kobayashi
Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add Units. SIGARCH Comput. Archit. News 44 (4) (2016)
Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Directive Generation Approach Using User-Defined Rules. CANDAR (2016)
Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi
Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework. Int. J. Netw. Comput. 6 (2) (2016)
Ryusuke Egawa, Wataru Uno, Masayuki Sato, Hiroaki Kobayashi, Jubee Tada
A power-aware LLC control mechanism for the 3D-stacked memory system. 3DIC (2016)
Masayuki Sato, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A cache partitioning mechanism to protect shared data for CMPs. COOL Chips (2016)
Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE. Int. J. Netw. Comput. 6 (2) (2016)
Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
Design of a 3-D stacked floating-point Goldschmidt divider. 3DIC (2015)
Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
An energy-efficient dynamic memory address mapping mechanism. COOL Chips (2015)
Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE. CANDAR (2015)
Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi
Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework. CANDAR (2015)
Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms. IEICE Trans. Electron. (7) (2015)
Hiroyuki Takizawa, Shoichi Hirasawa, Yasuharu Hayashi, Ryusuke Egawa, Hiroaki Kobayashi
Xevolver: An XML-based code translation framework for supporting HPC application migration. HiPC (2014)
Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information. ISC (2014)
Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
An impact of circuit scale on the performance of 3-D stacked arithmetic units. 3DIC (2014)
Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
An energy optimization method for vector processing mechanisms. COOL Chips (2014)
Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications. IEICE Trans. Inf. Syst. (11) (2014)
Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
On-chip checkpointing with 3D-stacked memories. 3DIC (2014)
Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts. IEICE Trans. Inf. Syst. (9) (2013)
Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
Design of a 3-D stacked floating-point adder. 3DIC (2013)
Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A flexible insertion policy for dynamic cache resizing mechanisms. COOL Chips (2013)
Ryusuke Egawa, Masayuki Sato, Jubee Tada, Hiroaki Kobayashi
Vertically integrated processor and memory module design for vector supercomputers. 3DIC (2013)
Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory. ESTIMedia (2013)
Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi
Abstract: Exploring Design Space of a 3D Stacked Vector Cache. SC Companion (2012)
Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A capacity-efficient insertion policy for dynamic cache resizing mechanisms. Conf. Computing Frontiers (2012)
Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
An out-of-order vector processing mechanism for multimedia applications. Conf. Computing Frontiers (2012)
Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A media-oriented vector architectural extension with a high bandwidth cache system. COOL Chips (2012)
Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi
Poster: Exploring Design Space of a 3D Stacked Vector Cache - Designing a 3D Stacked Vector Cache using Conventional EDA Tools. SC Companion (2012)
Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Effects of 3-D stacked vector cache on energy consumption. 3DIC (2011)
Jubee Tada, Ryusuke Egawa, Kazushige Kawai, Hiroaki Kobayashi, Gensuke Goto
A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers. 3DIC (2011)
Ling Xu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Network Clustering Algorithm for Sybil-Attack Resisting. IEICE Trans. Inf. Syst. (12) (2011)
Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
Power-Aware Dynamic Cache Partitioning for CMPs. Trans. High Perform. Embed. Archit. Compil. 3 (2011)
Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications. DSD (2010)
Yoshitomo Murata, Ryusuke Egawa, Manabu Higashida, Hiroaki Kobayashi
A History-Based Job Scheduling Mechanism for the Vector Computing Cloud. SAINT (2010)
Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Majority-Based Control Scheme for Way-Adaptable Caches. Facing the Multicore-Challenge (2010)
Ken-ichi Suzuki, Yoshiyuki Kaeriyama, Kazuhiko Komatsu, Ryusuke Egawa, Nobuyuki Ohba, Hiroaki Kobayashi
A Fast Ray-Tracing Using Bounding Spheres and Frustum Rays for Dynamic Scene Rendering. IEICE Trans. Inf. Syst. (4) (2010)
Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
Cache partitioning strategies for 3-D stacked vector processors. 3DIC (2010)
Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A voting-based working set assessment scheme for dynamic cache resizing mechanisms. ICCD (2010)
Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Design and early evaluation of a 3-D die stacked chip multi-vector processor. 3DIC (2010)
Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Performance evaluation of NEC SX-9 using real science and engineering applications. SC (2009)
Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi, Gensuke Goto
Evaluation of fine grain 3-D integrated arithmetic units. 3DIC (2009)
Yoshiei Sato, Ryu-ichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Performance tuning and analysis of future vector processors based on the roofline model. MEDEA@PACT (2009)
Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
3D on-chip memory for the vector architecture. 3DIC (2009)
Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
Modeling of cache access behavior based on Zipf's law. MEDEA@PACT (2008)
Chainan Satayapiwat, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation. ISPA (2008)
Akihiro Musa, Yoshiei Sato, Takashi Soga, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A shared cache for a chip multi vector processor. MEDEA@PACT (2008)
Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. ISPA (2008)
Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs. MEDEA@PACT (2007)

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Publication Activity (10 Years)

Top Topics

Top Venues

Ryusuke Egawa