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A shared cache for a chip multi vector processor.
Akihiro Musa
Yoshiei Sato
Takashi Soga
Koki Okabe
Ryusuke Egawa
Hiroyuki Takizawa
Hiroaki Kobayashi
Published in:
MEDEA@PACT (2008)
Keyphrases
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processing units
memory access
memory bandwidth
memory hierarchy
parallel computing
instruction set
cache misses
processor core
multithreading
memory subsystem
feature vectors
operating system
single chip
shared memory multiprocessors
ibm zenterprise
embedded processors
high speed