Akihiro Musa

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 20

Top Topics

Search Space Reduction

Newspaper Articles

Top Venues

Supercomput. Front. Innov.

IPDPS Workshops

J. Supercomput.

Publications

Yuto Hatanaka, Yuki Yamane, Kenta Yamaguchi, Takashi Soga, Akihiro Musa, Takashi Ishihara, Atsuya Uno, Kazuhiko Komatsu, Hiroaki Kobayashi, Mitsuo Yokokawa
File I/O Cache Performance of Supercomputer Fugaku Using an Out-of-Core Direct Numerical Simulation Code of Turbulence. ICCS (6) (2024)
Mitsuo Yokokawa, Yuki Yamane, Kenta Yamaguchi, Takashi Soga, Taiki Matsumoto, Akihiro Musa, Kazuhiko Komatsu, Takashi Ishihara, Hiroaki Kobayashi
I/O Performance Evaluation of a Memory-Saving DNS Code on SX-Aurora TSUBASA. IPDPS Workshops (2023)
Arata Endo, Shinji Yoshida, Shuichi Gojuki, Hiroaki Kataoka, Yoshihiko Sato, Akihiro Musa, Susumu Date
Consideration of a Supercomputing System with Cloud Bursting Functionality from an Operational Perspective. CloudCom (2022)
Yoichi Shimomura, Akihiro Musa, Yoshihiko Sato, Atsuhiko Konja, Guoqing Cui, Rei Aoyagi, Keichi Takahashi, Hiroyuki Takizawa
A Real-time Flood Inundation Prediction on SX-Aurora TSUBASA. HIPC (2022)
Takashi Soga, Kenta Yamaguchi, Raghunandan Mathur, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA. Supercomput. Front. Innov. 7 (4) (2020)
Takumi Kishitani, Kazuhiko Komatsu, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
Importance of Selecting Data Layouts in the Tsunami Simulation Code. IPDPS Workshops (2020)
Kenta Yamaguchi, Takashi Soga, Yoichi Shimomura, Thorsten Reimann, Kazuhiko Komatsu, Ryusuke Egawa, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines. Supercomput. Front. Innov. 6 (1) (2019)
Osamu Watanabe, Yuta Hougi, Kazuhiko Komatsu, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
Optimizing Memory Layout of Hyperplane Ordering for Vector Supercomputer SX-Aurora TSUBASA. MCHPC@SC (2019)
Akihiro Musa, Takashi Abe, Takumi Kishitani, Takuya Inoue, Masayuki Sato, Kazuhiko Komatsu, Yoichi Murashima, Shunichi Koshimura, Hiroaki Kobayashi
Performance Evaluation of Tsunami Inundation Simulation on SX-Aurora TSUBASA. ICCS (2) (2019)
Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Osamu Watanabe, Akihiro Musa, Mitsuo Yokokawa, Toshikazu Aoyama, Masayuki Sato, Hiroaki Kobayashi
Performance evaluation of a vector supercomputer SX-aurora TSUBASA. SC (2018)
Ilya V. Afanasyev, Alexander S. Antonov, Dmitry A. Nikitenko, Vadim V. Voevodin, Vladimir V. Voevodin, Kazuhiko Komatsu, Osamu Watanabe, Akihiro Musa, Hiroaki Kobayashi
Developing Efficient Implementations of Bellman-Ford and Forward-Backward Graph Algorithms for NEC SX-ACE. Supercomput. Front. Innov. 5 (3) (2018)
Akihiro Musa, Osamu Watanabe, Hiroshi Matsuoka, Hiroaki Hokari, Takuya Inoue, Yoichi Murashima, Yusaku Ohta, Ryota Hino, Shunichi Koshimura, Hiroaki Kobayashi
Real-time tsunami inundation forecast system for tsunami disaster prevention and mitigation. J. Supercomput. 74 (7) (2018)
Shivanshu Kumar Singh, Kota Sakakura, Sourav Saha, Raghunandan Mathur, Chirag Sharma, Koji Goto, Osamu Watanabe, Akihiro Musa
Optimizations of COAWST for a Large Simulation on the Earth Simulator. CLUSTER (2018)
Kazuhiko Komatsu, Takumi Kishitani, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor. MCSoC (2018)
Ryusuke Egawa, Kazuhiko Komatsu, Yoko Isobe, Toshihiro Kato, Souya Fujimoto, Hiroyuki Takizawa, Akihiro Musa, Hiroaki Kobayashi
Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs. CLUSTER (2017)
Ryusuke Egawa, Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE. J. Supercomput. 73 (9) (2017)
Osamu Watanabe, Akihiro Musa, Hiroaki Hokari, Shivanshu Kumar Singh, Raghunandan Mathur, Hiroaki Kobayashi
Performance Evaluation of Quantum ESPRESSO on NEC SX-ACE. CLUSTER (2017)
Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa, Hiroaki Kobayashi
Vectorization-Aware Loop Optimization with User-Defined Code Transformations. CLUSTER (2017)
Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE. Int. J. Netw. Comput. 6 (2) (2016)
Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE. CANDAR (2015)
Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Effects of 3-D stacked vector cache on energy consumption. 3DIC (2011)
Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
Design and early evaluation of a 3-D die stacked chip multi-vector processor. 3DIC (2010)
Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Performance evaluation of NEC SX-9 using real science and engineering applications. SC (2009)
Yoshiei Sato, Ryu-ichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Performance tuning and analysis of future vector processors based on the roofline model. MEDEA@PACT (2009)
Akihiro Musa, Yoshiei Sato, Takashi Soga, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
A shared cache for a chip multi vector processor. MEDEA@PACT (2008)
Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. ISPA (2008)
Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
An on-chip cache design for vector processors. MEDEA@PACT (2007)
Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi
Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications. ISPA (2006)