Hikaru Takayashiki

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 8

Top Topics

Top Venues

Supercomput. Front. Innov.

Publications

Hikaru Takayashiki, Hotaka Yagi, Hiroki Nishimoto, Naoki Yoshifuji
A New Sparse GEneral Matrix-matrix Multiplication Method for Long Vector Architecture by Hierarchical Row Merging. SC Workshops (2023)
Shunsuke Tsukada, Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
A Metadata Prefetching Mechanism for Hybrid Memory Architectures. IEICE Trans. Electron. (6) (2022)
Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
Page-Address Coalescing of Vector Gather Instructions for Efficient Address Translation. IA3@SC (2022)
Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
Register Flush-free Runahead Execution for Modern Vector Processors. SBAC-PAD (2021)
Shunsuke Tsukada, Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
A Metadata Prefetching Mechanism for Hybrid Memory Architectures. COOL CHIPS (2021)
Masayuki Sato, Takuya Toyoshima, Hikaru Takayashiki, Ryusuke Egawa, Hiroaki Kobayashi
An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems. Supercomput. Front. Innov. 6 (4) (2019)
Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
A Hardware Prefetching Mechanism for Vector Gather Instructions. IA3@SC (2019)
Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
A Skewed Multi-banked Cache for Many-core Vector Processors. Supercomput. Front. Innov. 6 (3) (2019)