Naveena Nagi

Publication Activity (10 Years)

Years Active: 1992-1999
Publications (10 Years): 0

Publications

Stephen K. Sunter, Naveena Nagi
Test Metrics for Analog Parametric Faults. VTS (1999)
Heebyung Yoon, Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi
Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits. VTS (1998)
Naveena Nagi, Abhijit Chatterjee, Heebyung Yoon, Jacob A. Abraham
Signature analysis for analog and mixed-signal circuit test response compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (6) (1998)
Stephen K. Sunter, Naveena Nagi
A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST. ITC (1997)
Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi
Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling. VTS (1997)
Abhijit Chatterjee, Naveena Nagi
Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial. VLSI Design (1997)
Abhijit Chatterjee, Bruce C. Kim, Naveena Nagi
Low-cost DC built-in self-test of linear analog circuits using checksums. VLSI Design (1996)
Abhijit Chatterjee, Bruce C. Kim, Naveena Nagi
DC Built-In Self-Test for Linear Analog Circuits. IEEE Des. Test Comput. 13 (2) (1996)
Ashok Balivada, Hong Zheng, Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham
A unified approach for fault simulation of linear mixed-signal circuits. J. Electron. Test. 9 (1-2) (1996)
Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham
Efficient multisine testing of analog circuits. VLSI Design (1995)
Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham
A Signature Analyzer for Analog and Mixed-signal Circuits. ICCD (1994)
Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham
Fault-based automatic test generator for linear analog circuits. ICCAD (1993)
Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham
MIXER: Mixed-Signal Fault Simulator. ICCD (1993)
Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham
Fault simulation of linear analog circuits. J. Electron. Test. 4 (4) (1993)
Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham
DRAFTS: Discretized Analog Circuit Fault Simulator. DAC (1993)
Rabindra K. Roy, Naveena Nagi, Abhijit Chatterjee, Manuel A. d'Abreu
Delay fault testing of iterative arithmetic arrays. VTS (1992)
Naveena Nagi, Jacob A. Abraham
Hierarchical fault modeling for analog and mixed-signal circuits. VTS (1992)