Ing-Jer Huang

Publication Activity (10 Years)

Years Active: 1992-2023
Publications (10 Years): 7

Top Topics

Cache Conscious

Principal Component Analysis

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Shih-Jung Pao, Chuan-Pin Huang, Yen-Chi Peng, Ing-Jer Huang
Focusing on the Key Suspicious Trojan Nets with a Collaborative Approach. ISQED (2023)
Ing-Jer Huang, Yi-Ju Ke, Shih-Jung Pao
Critical Signature Assertion and On-the-Fly Recovery for Control Flow Errors in Processors. MCSoC (2022)
Wen-Lan Wu, Jing-Min Liang, Chien-Fei Chen, Kuei-Lan Tsai, Nian-Shing Chen, Kuo-Chin Lin, Ing-Jer Huang
Creating a Scoring System with an Armband Wearable Device for Table Tennis Forehand Loop Training: Combined Use of the Principal Component Analysis and Artificial Neural Network. Sensors 21 (11) (2021)
Hsu-Kang Dow, Ing-Jer Huang, Robert Rieger, Ko-Chi Kuo, Lan-Yuen Guo, Shih-Jung Pao
A Bio-Sensing System-on-Chip and Software for Smart Clothes. ICCE (2019)
Ing-Jer Huang, Chun-Hung Lai, Yun-Chung Yang, Hsu-Kang Dow, Hung-Lun Chen
A Reconfigurable Cache for Efficient Use of Tag RAM as Scratch-Pad Memory. IEEE Trans. Very Large Scale Integr. Syst. 26 (4) (2018)
Tsun-Hsin Chang, Shao-Chieh Hou, Ing-Jer Huang
A unified GDB-based source-transaction level SW/HW co-debugging. APCCAS (2016)
Jyun-Yan Li, Ing-Jer Huang
Full system verification of compatible microprocessors with a dual physical core verification platform. ISOCC (2016)
Hsu-Kang Dow, Ching-Hua Huang, Chun-Hung Lai, Kai-Hsiang Tsao, Sheng-Chih Tseng, Kun-Yi Wu, Ting-Hsuan Wu, Ho-Chun Yang, Da-Jing Zhang-Jian, Yun-Nan Chang, Steve Haga, Shen-Fu Hsiao, Ing-Jer Huang, Shiann-Rong Kuang, Chung-Nan Lee
An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development support. VLSI-DAT (2015)
Chun-Hung Lai, Yun-Chung Yang, Ing-Jer Huang
A Versatile Data Cache for Trace Buffer Support. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2014)
Ping-Chun Lee, Ing-Jer Huang
Reconfigurable Bus Monitor Tool Suite for on-chip SoC for performance and protocol monitoring. ReCoSoC (2014)
Chun-Hung Lai, Yun-Chung Yang, Ing-Jer Huang
A versatile data cache for trace buffer support. VLSI-DAT (2013)
Yi-Hao Chang, Chi-Tsai Yeh, Ing-Jer Huang, Shau-Yin Tseng
A performance monitoring tool suite for 3D graphics SoC application. APCCAS (2012)
Cheng-Ta Wu, Feng-Xiang Huang, Kuan-Fu Kuo, Ing-Jer Huang
An OCP-AHB bus wrapper with built-in ICE support for SOC integration. VLSI-DAT (2012)
Chi-Tsai Yeh, Chun-Hao Wang, Ing-Jer Huang, Weng-Fai Wong
Internet-based hardware/software co-design framework for embedded 3D graphics applications. EURASIP J. Adv. Signal Process. 2011 (2011)
Liang-Bi Chen, Yen-Ling Chen, Ing-Jer Huang
A Real-Time Power Analysis Platform for Power-Aware Embedded System Development. J. Inf. Sci. Eng. 27 (3) (2011)
Chun-Hung Lai, Fu-Ching Yang, Ing-Jer Huang
A Trace-Capable Instruction Cache for Cost-Efficient Real-Time Program Trace Compression in SoC. IEEE Trans. Computers 60 (12) (2011)
Fu-Ching Yang, Yi-Ting Lin, Chung-Fu Kao, Ing-Jer Huang
An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution Supports for SoC. IEEE Trans. Very Large Scale Integr. Syst. 19 (4) (2011)
Liang-Bi Chen, Tsung-Yu Ho, Jiun-Cheng Ju, Cheng-Lung Chiang, Chung-Nan Lee, Ing-Jer Huang
An embedded debugging/performance monitoring engine for a tile-based 3D graphics SoC development. ASP-DAC (2010)
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization. IEEE Trans. Very Large Scale Integr. Syst. 18 (5) (2010)
Liang-Bi Chen, Jiun-Cheng Ju, Chien-Chou Wang, Ing-Jer Huang
HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms. IEICE Trans. Inf. Syst. (8) (2010)
Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang
An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC (2009)
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
A Reverse-encoding-based On-chip AHB Bus Tracer Supporting both Post-T and Pre-T Trace. ISCAS (2009)
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization. ASP-DAC (2009)
Liang-Bi Chen, Chi-Tsai Yeh, Hung-Yu Chen, Ing-Jer Huang
A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)
Chun-Hung Lai, Fu-Ching Yang, Chung-Fu Kao, Ing-Jer Huang
A trace-capable instruction cache for cost efficient real-time program trace compression in SoC. DAC (2009)
Fu-Ching Yang, Wen-Kai Huang, Jing-Kun Zhong, Ing-Jer Huang
Automatic Verification of External Interrupt Behaviors for Microprocessor Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (9) (2008)
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus. ICCAD (2008)
Yi-Ting Lin, Wen-Chi Shiue, Ing-Jer Huang
A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer. DAC (2008)
Chung-Fu Kao, Hsin-Ming Chen, Ing-Jer Huang
Hardware-Software Approaches to In-Circuit Emulation for Embedded Processors. IEEE Des. Test Comput. 25 (5) (2008)
Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang
NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem. IIH-MSP (2008)
Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang
On-Chip-Network cryptosystem: A high throughput and high security architecture. APCCAS (2008)
Liang-Bi Chen, Yung-Chih Liu, Chen-Hung Chen, Chung-Fu Kao, Ing-Jer Huang
Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. ASP-DAC (2008)
Yi-Ting Lin, Chien-Chou Wang, Ing-Jer Huang
AMBA AHB bus potocol checker with efficient debugging mechanism. ISCAS (2008)
Chung-Fu Kao, Ing-Jer Huang, Chi-Hung Lin
An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration. DAC (2007)
Tse-Chen Yeh, Tsung-Yu Ho, Hung-Yu Chen, Ing-Jer Huang
SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics. EUC (2007)
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang
Automatic Verification of External Interrupt Behaviors for Microprocessor Design. DAC (2007)
Chung-Fu Kao, Chi-Hung Lin, Ing-Jer Huang
Configurable AMBA On-Chip Real-Time Signal Tracer. ASP-DAC (2007)
Chung-Fu Kao, Shyh-Ming Huang, Ing-Jer Huang
A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2007)
Liang-Bi Chen, Ching-Chi Hu, Yen-Ling Chen, Chi-Wei Chu, Ing-Jer Huang
The AES Design Space Exploration with a Soft IP Generator. IIH-MSP (2007)
Fu-Ching Yang, Ing-Jer Huang
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools. ASP-DAC (2007)
Liang-Bi Chen, Ing-Jer Huang, Yuan-Long Jeang
Design of a Dynamic PCM Selector for Non-deterministic Environment. APCCAS (2006)
Wen-Kai Huang, I-Ting Lin, Shi-Wei Chen, Ing-Jer Huang
A cost-effective media processor for embedded applications [audio decoder example]. ISCAS (6) (2005)
Shyh-Ming Huang, Ing-Jer Huang, Chung-Fu Kao
Reconfigurable real-time address trace compressor for embedded microprocessors. FPT (2003)
Ing-Jer Huang, Dao-Zhen Chen
Mining Correlations of Human Gene Expression from Digital Gene Expression Profiles. J. Inf. Sci. Eng. 19 (6) (2003)
Ing-Jer Huang, Dao-Zhen Chen
Automatic Assembly Program Retargeting for Micrco controllers. J. Inf. Sci. Eng. 19 (5) (2003)
Ing-Jer Huang, Ping-Huei Xie
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. IEEE Trans. Very Large Scale Integr. Syst. 10 (1) (2002)
Ing-Jer Huang, Li-Rong Wang, Yu-Min Wang, Tai-An Lu
Design Exploration of an Industrial Embedded Microcontroller: Performance, Cost and Software Compatibility. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2002)
Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching-Nan Juan, Tai-An Lu
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors. IEEE Des. Test Comput. 19 (4) (2002)
Ing-Jer Huang
Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. ACM Trans. Design Autom. Electr. Syst. 6 (1) (2001)
Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen
Parameterized MAC unit implementation. ASP-DAC (2001)
Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao
Reusable embedded in-circuit emulator. ASP-DAC (2001)
Ing-Jer Huang, Dao-Zhen Chen
A new approach to assembly software retargeting for microcontrollers. ASP-DAC (2000)
Ing-Jer Huang, Wen-Fu Kao
A Machine State Transition Approach to Instruction Retargeting for Embedded Microprocessors. Des. Autom. Embed. Syst. 5 (2) (2000)
Ing-Jer Huang, Tai-An Lu
ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers. DAC (1999)
Ing-Jer Huang, Li-Rong Wang
Automatic Simulation and Verification of Pipelined Microcontrollers. J. Inf. Sci. Eng. 15 (2) (1999)
Ing-Jer Huang, Tzu-Chin Peng
Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design. ICCD (1998)
Ing-Jer Huang, Ping-Huei Xie
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation. ISSS (1998)
Ing-Jer Huang
A Case Study: Synthesis and Exploration of Instruction Set Design for Application-Specific Symbolic Computing. J. Inf. Sci. Eng. 14 (4) (1998)
Ing-Jer Huang, Li-Rong Wang, Yu-Min Wang
Synthesis and analysis of an industrial embedded microcontroller. ASP-DAC (1997)
Ing-Jer Huang, Alvin M. Despain
Synthesis of application specific instruction sets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (6) (1995)
Ing-Jer Huang, Alvin M. Despain
Generating instruction sets and microarchitectures from applications. ICCAD (1994)
Ing-Jer Huang, Alvin M. Despain
Synthesis of Instruction Sets for Pipelined Microprocessors. DAC (1994)
Ing-Jer Huang, Alvin M. Despain
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. ICCAD (1993)
Ing-Jer Huang, Alvin M. Despain
An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. MICRO (1993)
Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain
Application-Driven Design Automation for Microprocessor Design. DAC (1992)
Ing-Jer Huang, Alvin M. Despain
High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. DAC (1992)