Kun-Yi Wu

Publication Activity (10 Years)

Years Active: 2009-2016
Publications (10 Years): 2

Top Topics

Interval Arithmetic

Hardware Implementation

Pipeline Architecture

Top Venues

Int. J. Comput. Sci. Eng.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Shiann-Rong Kuang, Kun-Yi Wu, Ren-Yao Lu
Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Hsu-Kang Dow, Ching-Hua Huang, Chun-Hung Lai, Kai-Hsiang Tsao, Sheng-Chih Tseng, Kun-Yi Wu, Ting-Hsuan Wu, Ho-Chun Yang, Da-Jing Zhang-Jian, Yun-Nan Chang, Steve Haga, Shen-Fu Hsiao, Ing-Jer Huang, Shiann-Rong Kuang, Chung-Nan Lee
An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development support. VLSI-DAT (2015)
Shiann-Rong Kuang, Kun-Yi Wu, Bao-Chen Ke, Jia-Huei Yeh, Hao-Yi Jheng
Efficient architecture and hardware implementation of hybrid fuzzy-Kalman filter for workload prediction. Integr. 47 (4) (2014)
Kun-Yi Wu, Chih-Yuan Liang, Kee-Khuan Yu, Shiann-Rong Kuang
Multiple-mode floating-point multiply-add fused unit for trading accuracy with power consumption. ICIS (2013)
Shiann-Rong Kuang, Kun-Yi Wu, Kee-Khuan Yu
Energy-Efficient Multiple-Precision Floating-Point Multiplier for Embedded Applications. J. Signal Process. Syst. 72 (1) (2013)
Kun-Yi Wu, Shiann-Rong Kuang, Kee-Khuan Yu
An exact method for estimating maximum errors of multi-mode floating-point iterative booth multiplier. Int. J. Comput. Sci. Eng. 8 (4) (2013)
Tzu-Chuen Lu, Kun-Yi Wu
A transaction pattern analysis system based on neural network. Expert Syst. Appl. 36 (3) (2009)