Ruei-Ting Gu

Publication Activity (10 Years)

Years Active: 2009-2017
Publications (10 Years): 1

Top Topics

Model Based Testing

Statistical Significance

Top Venues

Asian Test Symposium

Publications

Katherine Shu-Min Li, Sying-Jyan Wang, Ruei-Ting Gu, Bo-Chuan Cheng
Layout-Aware Optimized Prebond Silicon Interposer Test Synthesis. IEEE Des. Test 34 (6) (2017)
Katherine Shu-Min Li, Sying-Jyan Wang, Jia-Lin Wu, Cheng-You Ho, Yingchieh Ho, Ruei-Ting Gu, Bo-Chuan Cheng
Optimized Pre-bond Test Methodology for Silicon Interposer Testing. ATS (2014)
Katherine Shu-Min Li, Cheng-You Ho, Ruei-Ting Gu, Sying-Jyan Wang, Yingchieh Ho, Jiun-Jie Huang, Bo-Chuan Cheng, An-Ting Liu
A Layout-Aware Test Methodology for Silicon Interposer in System-in-a-Package. Asian Test Symposium (2013)
Chih-Yun Pai, Ruei-Ting Gu, Bo-Chuan Cheng, Liang-Bi Chen, Katherine Shu-Min Li
A Unified Interconnects Testing Scheme for 3D Integrated Circuits. Asian Test Symposium (2011)
Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang
An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC (2009)