Ching-Long Su

Publication Activity (10 Years)

Years Active: 1992-2011
Publications (10 Years): 0

Publications

Ching-Long Su, S. M. Yang, W. L. Huang
A two-stage algorithm integrating genetic algorithm and modified Newton method for neural network training in engineering systems. Expert Syst. Appl. 38 (10) (2011)
Ching-Long Su, Chein-Wei Jen
Motion estimation using on-line arithmetic. ISCAS (2000)
Ching-Long Su, Yin-Tsung Hwang
Distributed arithmetic-based architectures for high speed IIR filter design. ICPADS (1996)
Ching-Long Su, Alvin M. Despain
Cache design trade-offs for power and performance optimization: a case study. ISLPD (1995)
Ching-Long Su, Alvin M. Despain
Cache designs for energy efficiency. HICSS (1) (1995)
Ching-Long Su, Alvin M. Despain
Hardware-software co-designing benchmark-driven superpipelined instruction set processors. COMPSAC (1994)
Ching-Long Su, Chin-Chi Teng, Alvin M. Despain
A Study of Cache Hashing Functions for Symbolic Applications in Micro-Parallel Processors. ICPADS (1994)
Ching-Long Su, Alvin M. Despain
Branch with Masked Squashing in Superpipelined Processors. ISCA (1994)
Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain
Lower Power Architecture Design and Compilation Techniques for High-Performance Processors. COMPCON (1994)
Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain
Saving Power in the Control Path of Embedded Processors. IEEE Des. Test Comput. 11 (4) (1994)
Ching-Long Su, Alvin M. Despain
Minimizing branch misprediction penalties for superpipelined processors. MICRO (1994)
Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain
Application-Driven Design Automation for Microprocessor Design. DAC (1992)