Chi-Ying Tsui

ORCID

Publication Activity (10 Years)

Years Active: 1992-2023
Publications (10 Years): 97

Top Venues

ISCAS

CoRR

ASP-DAC

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Jingyu He, Ziyang Shen, Fengshi Tian, Jinbo Chen, Jie Yang, Mohamad Sawan, Hsiang-Ting Chen, Paul Bogdan, Chi-Ying Tsui
SNNOpt: An Application-Specific Design Framework for Spiking Neural Networks. AICAS (2023)
Jingyu He, Yucong Huang, Miguel Lastras, Terry Tao Ye, Chi-Ying Tsui, Kwang-Ting Cheng
RVComp: Analog Variation Compensation for RRAM-Based in-Memory Computing. ASP-DAC (2023)
Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (2) (2023)
Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jiakun Zheng, Hui Wu, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng
BIOS: A 40nm Bionic Sensor-defined 0.47pJ/SOP, 268.7TSOPs/W Configurable Spiking Neuron-in-Memory Processor for Wearable Healthcare. ESSCIRC (2023)
Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng
Binary is All You Need: Ultra-Efficient Arrhythmia Detection with a Binary-Only Compressive System. AICAS (2023)
Soumitra Pal, Gajendranath Chowdary, Wing-Hung Ki, Chi-Ying Tsui
Energy-Efficient Dual-Node-Upset-Recoverable 12T SRAM for Low-Power Aerospace Applications. IEEE Access 11 (2023)
Fengshi Tian, Shiqi Zhao, Jingyu He, Jinbo Chen, Xiaomeng Wang, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng
NOLS: A Near-sensor On-chip Learning System with Direct Feedback Alignment for Personalized Wearable Heart Health Monitoring. BioCAS (2023)
Jingbo Jiang, Xizi Chen, Chi-Ying Tsui
Accelerating Large Kernel Convolutions with Nested Winograd Transformation. VLSI-SoC (2023)
Xiaomeng Wang, Fengshi Tian, Xizi Chen, Jiakun Zheng, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Kwang-Ting Cheng, Chi-Ying Tsui
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications. CoRR (2023)
Jia Chen, Fengbin Tu, Kunming Shao, Fengshi Tian, Xiao Huo, Chi-Ying Tsui, Kwang-Ting Cheng
AutoDCIM: An Automated Digital CIM Compiler. DAC (2023)
Xizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui
Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification. DAC (2023)
Syed Mohsin Abbas, Marwan Jalaleddine, Chi-Ying Tsui, Warren J. Gross
Step-GRAND: A Low Latency Universal Soft-input Decoder. CoRR (2023)
Linping Qu, Shenghui Song, Chi-Ying Tsui, Yuyi Mao
How Robust is Federated Learning to Communication Error? A Comparison Study Between Uplink and Downlink Channels. CoRR (2023)
Xianghong Hu, Xuejiao Liu, Yu Liu, Haowei Zhang, Xijie Huang, Xihao Guan, Luhong Liang, Chi-Ying Tsui, Xiaoming Xiong, Kwang-Ting Cheng
A Tiny Accelerator for Mixed-Bit Sparse CNN Based on Efficient Fetch Method of SIMO SPad. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)
Xiaodong Meng, Xing Li, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki
A Primary Driver with Real-Time Resonance Tracking for Wireless-Powered Implantable Medical Devices. A-SSCC (2023)
Linping Qu, Shenghui Song, Chi-Ying Tsui
FedDQ: Communication-Efficient Federated Learning with Descending Quantization. GLOBECOM (2022)
Sayan Sarkar, Jingbo Jiang, Wing-Hung Ki, Chi-Ying Tsui
A 16-bit Encrypted On-chip Embedded System for Implantable Medical Devices. ISCAS (2022)
Soumitra Pal, Wing-Hung Ki, Chi-Ying Tsui
Soft-Error-Aware Read-Stability-Enhanced Low-Power 12T SRAM With Multi-Node Upset Recoverability for Aerospace Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui
Design Strategy of Off-Resonant Tertiary Coils for Uplink Detection in Biomedical Implants. ISCAS (2022)
Xiaomeng Wang, Xuejiao Liu, Xianghong Hu, Xiaopeng Zhong, Xizi Chen, Yu Liu, Patrick Kong, Fengshi Tian, Chi-Ying Tsui
TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network. AICAS (2022)
Jingbo Jiang, Xizi Chen, Chi-Ying Tsui
A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters. CoRR (2021)
Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. CoRR (2021)
Bo Zhang, Pedro V. Sander, Chi-Ying Tsui, Amine Bermak
Microshift: An Efficient Image Compression Algorithm for Hardware. CoRR (2021)
Linping Qu, Shenghui Song, Chi-Ying Tsui
FedDQ: Communication-Efficient Federated Learning with Descending Quantization. CoRR (2021)
ChenYang Xia, Chi-Ying Tsui, YouZhe Fan
Construction of Multi-Kernel Polar Codes With Kernel Substitution. IEEE Wirel. Commun. Lett. 9 (11) (2020)
Xiaopeng Zhong, Man-Kay Law, Chi-Ying Tsui, Amine Bermak
A Fully Dynamic Multi-Mode CMOS Vision Sensor With Mixed-Signal Cooperative Motion Sensing and Object Segmentation for Adaptive Edge Computing. IEEE J. Solid State Circuits 55 (6) (2020)
Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
Design of a Single-Stage Wireless Charger with 92.3%-Peak-Efficiency for Portable Devices Applications. ASP-DAC (2020)
Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Kebin Jia
A Low-Power Motion Estimation Architecture for HEVC Based on a New Sum of Absolute Difference Computation. IEEE Trans. Circuits Syst. Video Technol. 30 (1) (2020)
Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
A 6.78-MHz Single-Stage Wireless Charger With Constant-Current Constant-Voltage Charging Technique. IEEE J. Solid State Circuits 55 (4) (2020)
Lin Cheng, Xinyuan Ge, Langyu Hu, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui
A 40.68-MHz Active Rectifier With Hybrid Adaptive On/Off Delay-Compensation Scheme for Biomedical Implantable Devices. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2020)
Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation. DAC (2020)
ChenYang Xia, YouZhe Fan, Chi-Ying Tsui
A Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes. ISCAS (2019)
Bo Wang, Man-Kay Law, Jun Yi, Chi-Ying Tsui, Amine Bermak
A -12.3 dBm UHF Passive RFID Sense Tag for Grid Thermal Monitoring. IEEE Trans. Ind. Electron. 66 (11) (2019)
Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui
SubMac: Exploiting the subword-based computation in RRAM-based CNN accelerator for energy saving and speedup. Integr. 69 (2019)
Zizhen Zeng, Shanpu Shen, Xiaopeng Zhong, Xing Li, Chi-Ying Tsui, Amine Bermak, Ross D. Murch, Edgar Sánchez-Sinencio
Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4 dBm With 99.8% Peak MPPT Power Efficiency. IEEE J. Solid State Circuits 54 (9) (2019)
Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
A 6.78MHz 92.3%-Peak-Efficiency Single-Stage Wireless Charger with CC-CV Charging and On-Chip Bootstrapping Techniques. VLSI Circuits (2019)
Bo Zhang, Pedro V. Sander, Chi-Ying Tsui, Amine Bermak
Microshift: An Efficient Image Compression Algorithm for Hardware. IEEE Trans. Circuits Syst. Video Technol. 29 (11) (2019)
Xiaodong Meng, Xing Li, Xiaopeng Zhong, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki
A 2.2μW 600kHz Frequency-Locked Relaxation Oscillator with 0.046%/V Voltage and 48.69ppm/°C Temperature Stability for IoT Sensor Node Applications. VLSI Circuits (2019)
ChenYang Xia, YouZhe Fan, Chi-Ying Tsui
A Two-staged Adaptive Successive Cancellation List Decoding for Polar Codes. CoRR (2019)
Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Kebin Jia
A New Rate-Complexity-Distortion Model for Fast Motion Estimation Algorithm in HEVC. IEEE Trans. Multim. 21 (4) (2019)
Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
CompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation. ASP-DAC (2019)
Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui
A Fully Integrated Analog Front End for Biopotential Signal Sensing. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui
SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity. DATE (2018)
Xiaopeng Zhong, Qian Yu, Amine Bermak, Chi-Ying Tsui, May-Kay Law
A 2PJ/Pixel/Direction MIMO Processing Based CMOS Image Sensor for Omnidirectional Local Binary Pattern Extraction and Edge Detection. VLSI Circuits (2018)
ChenYang Xia, Ji Chen, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
A High-Throughput Architecture of List Successive Cancellation Polar Codes Decoder with Large List Size. CoRR (2018)
Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui
Analysis and Design of a Ripple Reduction Chopper Bandpass Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2018)
Yuan Yao, Xiaodong Meng, Chi-Ying Tsui, Wing-Hung Ki
Polyimide-Based Flexible 3-Coil Inductive Link Design and Optimization. APCCAS (2018)
YouZhe Fan, ChenYang Xia, Ji Chen, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
A Low-Latency List Successive-Cancellation Decoding Implementation for Polar Codes. CoRR (2018)
Lin Cheng, Xinyuan Ge, Wing-Hung Ki, Chi-Ying Tsui
A Simplified PWM Controller for Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. APCCAS (2018)
Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui
A high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization. ASP-DAC (2018)
ChenYang Xia, Ji Chen, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
A High-Throughput Architecture of List Successive Cancellation Polar Codes Decoder With Large List Size. IEEE Trans. Signal Process. 66 (14) (2018)
Qian Yu, Farid Boussaïd, Amine Bermak, Chi-Ying Tsui
Room-Temperature Dual-mode CMOS Gas-FET Sensor for Diabetes Detection. ISCAS (2018)
Bo Wang, Man-Kay Law, Chi-Ying Tsui, Amine Bermak
Resolution FoM Temperature Sensor Using Astable Multivibrator. IEEE Trans. Circuits Syst. II Express Briefs (7) (2018)
Mahsa Mousavi, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Bin Li, Hui Shen
Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes. IEEE Trans. Signal Process. 66 (14) (2018)
Xiaopeng Zhong, Bo Zhang, Amine Bermak, Chi-Ying Tsui, Man-Kay Law
A Low-Power Compression-Based CMOS Image Sensor With Microshift-Guided SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs (10) (2018)
Xiaodong Meng, Xing Li, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki
An Indoor Solar Energy Harvester with Ultra-Low-Power Reconfigurable Power-On-Reset-Styled Voltage Detector. ISCAS (2018)
Langyu Hu, Lin Cheng, Yuan Yao, Tak-Sang Yim, Wing-Hung Ki, Chi-Ying Tsui
A 40.68MHz Active Rectifier with Hybrid Delay Compensation Scheme. APCCAS (2018)
ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui
On Path Memory in List Successive Cancellation Decoder of Polar Codes. ISCAS (2018)
Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
Concatenated LDPC-polar codes decoding through belief propagation. ISCAS (2017)
Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui
BHNN: A memory-efficient accelerator for compressing deep neural networks with blocked hashing techniques. ASP-DAC (2017)
Xiaopeng Zhong, Amine Bermak, Chi-Ying Tsui
A low-offset dynamic comparator with area-efficient and low-power offset cancellation. VLSI-SoC (2017)
Feng Gao, Amine Bermak, Chi-Ying Tsui, Farid Boussaïd
Dual transduction Gas sensor based on a surface acoustic wave resonator. ISCAS (2017)
ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui, ChongYang Zeng, Jie Jin, Bin Li
An implementation of list successive cancellation decoder with large list size for polar codes. FPL (2017)
Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
Concatenated LDPC-Polar Codes Decoding Through Belief Propagation. CoRR (2017)
Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui
SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity. CoRR (2017)
Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui
A 6.78-MHz Single-Stage Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. IEEE J. Solid State Circuits 52 (5) (2017)
Xing Li, Yin-Ping Li, Chi-Ying Tsui, Wing-Hung Ki
Wireless Power Transfer System With ΣΔ-Modulated Transmission Power and Fast Load Response for Implantable Medical Devices. IEEE Trans. Circuits Syst. II Express Briefs (3) (2017)
ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui
On Path Memory in List Successive Cancellation Decoder of Polar Codes. CoRR (2017)
Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
High-Throughput and Energy-Efficient Belief Propagation Polar Code Decoder. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Jiawei Zheng, Wing-Hung Ki, Langyu Hu, Chi-Ying Tsui
Chopper Capacitively Coupled Instrumentation Amplifier Capable of Handling Large Electrode Offset for Biopotential Recordings. IEEE Trans. Circuits Syst. II Express Briefs (12) (2017)
Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui
A wireless power receiver with a 3-level reconfigurable resonant regulating rectifier for mobile-charging applications. ASP-DAC (2017)
Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui
BiLink: A high performance NoC router architecture using bi-directional link with double data rate. Integr. 55 (2016)
YouZhe Fan, ChenYang Xia, Ji Chen, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
A Low-Latency List Successive-Cancellation Decoding Implementation for Polar Codes. IEEE J. Sel. Areas Commun. 34 (2) (2016)
Lin Cheng, Wing-Hung Ki, Tat-To Wong, Tak-Sang Yim, Chi-Ying Tsui
21.7 A 6.78MHz 6W wireless power receiver with a 3-level 1× / ½ × / 0× reconfigurable resonant regulating rectifier. ISSCC (2016)
Zhiliang Qian, Paul Bogdan, Chi-Ying Tsui, Radu Marculescu
Performance Evaluation of NoC-Based Multicore Systems: From Traffic Analysis to NoC Latency Modeling. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Burg, Claude Thibeault, Warren J. Gross
Hardware Decoders for Polar Codes: An Overview. CoRR (2016)
Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui
LRADNN: High-throughput and energy-efficient Deep Neural Network accelerator using Low Rank Approximation. ASP-DAC (2016)
Syed Mohsin Abbas, Chi-Ying Tsui
Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO. VLSI-SoC (2016)
Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui
A low-power chopper bandpass amplifier for biopotential sensors. ISCAS (2016)
Ji Chen, YouZhe Fan, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Kai Chen, Bin Li
Low-Complexity List Successive-Cancellation Decoding of Polar Codes Using List Pruning. GLOBECOM (2016)
Xiaodong Meng, Xing Li, Chi-Ying Tsui, Wing-Hung Ki
An indoor solar energy harvesting system using dual mode SIDO converter with fully digital time-based MPPT. ISCAS (2016)
Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross
Hardware decoders for polar codes: An overview. ISCAS (2016)
Zhiliang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, Radu Marculescu
A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (3) (2016)
Syed Mohsin Abbas, Chi-Ying Tsui
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO. VLSI-SoC (Selected Papers) (2016)
Zizhen Zeng, Xing Li, Amine Bermak, Chi-Ying Tsui, Wing-Hung Ki
A WLAN 2.4-GHz RF energy harvesting system with reconfigurable rectifier for wireless sensor network. ISCAS (2016)
Xing Li, Chi-Ying Tsui, Wing-Hung Ki
12.8 Wireless power transfer system using primary equalizer for coupling- and load-range extension in bio-implant applications. ISSCC (2015)
Xing Li, Xiaodong Meng, Chi-Ying Tsui, Wing-Hung Ki
Reconfigurable Resonant Regulating Rectifier With Primary Equalization for Extended Coupling- and Loading-Range in Bio-Implant Wireless Power Transfer. IEEE Trans. Biomed. Circuits Syst. 9 (6) (2015)
Xing Li, Chi-Ying Tsui, Wing-Hung Ki
UHF energy harvesting system using reconfigurable rectifier for wireless sensor network. ISCAS (2015)
Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Amin Zheng
A fast variable block size motion estimation algorithm with refined search range for a two-layer data reuse scheme. ISCAS (2015)
YouZhe Fan, Ji Chen, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
Low-latency List Decoding Of Polar Codes With Double Thresholding. CoRR (2015)
Xing Li, Chi-Ying Tsui, Wing-Hung Ki
Power Management Analysis of Inductively-Powered Implants with 1X/2X Reconfigurable Rectifier. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2015)
Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
Low Complexity Belief Propagation Polar Code Decoders. CoRR (2015)
Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui
Low complexity belief propagation polar code decoder. SiPS (2015)
Youngsoo Shin, Chi-Ying Tsui
Message from the technical program chairs. VLSI-SoC (2015)
YouZhe Fan, Ji Chen, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li
Low-latency list decoding of polar codes with double thresholding. ICASSP (2015)
Xing Li, Chi-Ying Tsui, Wing-Hung Ki
A 13.56 MHz Wireless Power Transfer System With Reconfigurable Resonant Regulating Rectifier and Wireless Power Control for Implantable Medical Devices. IEEE J. Solid State Circuits 50 (4) (2015)
Zhiliang Qian, Syed Mohsin Abbas, Chi-Ying Tsui
FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels. IEEE Trans. Very Large Scale Integr. Syst. 23 (9) (2015)
Luheng Jia, Oscar C. Au, Chi-Ying Tsui, Wei Dai, Pengfei Wan
A fast intermode decision algorithm based on analysis of inter prediction residual. MMSP (2014)
Yuankun Xue, Zhiliang Qian, Guopeng Wei, Paul Bogdan, Chi-Ying Tsui, Radu Marculescu
An efficient Network-on-Chip (NoC) based multicore platform for hierarchical parallel genetic algorithms. NOCS (2014)
YouZhe Fan, Chi-Ying Tsui
An Efficient Partial-Sum Network Architecture for Semi-Parallel Polar Codes Decoder Implementation. IEEE Trans. Signal Process. 62 (12) (2014)

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Publication Activity (10 Years)

Top Topics

Top Venues

Chi-Ying Tsui