TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.
Xiaomeng WangXuejiao LiuXianghong HuXiaopeng ZhongXizi ChenYu LiuPatrick KongFengshi TianChi-Ying TsuiPublished in: AICAS (2022)