Marwan Jalaleddine

Publication Activity (10 Years)

Years Active: 2021-2023
Publications (10 Years): 15

Top Topics

Rayleigh Fading

Simulated Annealing

Top Venues

GLOBECOM (Workshops)

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Syed Mohsin Abbas, Chi-Ying Tsui, Marwan Jalaleddine, Warren J. Gross
Step-GRAND: A Low Latency Universal Soft-Input Decoder. GLOBECOM (Workshops) (2023)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
List-GRAND: A Practical Way to Achieve Maximum Likelihood Decoding. IEEE Trans. Very Large Scale Integr. Syst. 31 (1) (2023)
Ryan Seah, Huayi Zhou, Marwan Jalaleddine, Warren J. Gross
xSA: A Binary Cross-Entropy Simulated Annealing Polar Decoder. ISTC (2023)
Syed Mohsin Abbas, Marwan Jalaleddine, Chi-Ying Tsui, Warren J. Gross
Step-GRAND: A Low Latency Universal Soft-input Decoder. CoRR (2023)
Marwan Jalaleddine, Huayi Zhou, Jiajie Li, Warren J. Gross
Partial Ordered Statistics Decoding with Enhanced Error Patterns. ISIT (2023)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30 (6) (2022)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
GRAND for Rayleigh Fading Channels. CoRR (2022)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
GRAND for Rayleigh Fading Channels. GLOBECOM (Workshops) (2022)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO). J. Signal Process. Syst. 94 (10) (2022)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
List-GRAND: A practical way to achieve Maximum Likelihood Decoding. CoRR (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP (2021)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI Architecture for GRAND Markov Order. SiPS (2021)
Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI Architecture for GRAND Markov Order. CoRR (2021)